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Searched refs:isStore (Results 1 – 25 of 33) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp281 bool &isLoad, bool &isStore) { in GetInstrType() argument
285 isStore = MCID.mayStore(); in GetInstrType()
334 bool isFirst, isSingle, isCracked, isLoad, isStore; in getHazardType() local
337 isLoad, isStore); in getHazardType()
392 bool isFirst, isSingle, isCracked, isLoad, isStore; in EmitInstruction() local
395 isLoad, isStore); in EmitInstruction()
402 if (isStore && NumStores < 4 && !MI->memoperands_empty()) { in EmitInstruction()
DPPCHazardRecognizers.h92 bool &isLoad, bool &isStore);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
DMipsInstructionSelector.cpp189 const bool isStore = Opc == TargetOpcode::G_STORE; in selectLoadStoreOpCode() local
196 if (isStore) in selectLoadStoreOpCode()
228 return isStore ? Mips::SWC1 : Mips::LWC1; in selectLoadStoreOpCode()
231 return isStore ? Mips::SDC164 : Mips::LDC164; in selectLoadStoreOpCode()
232 return isStore ? Mips::SDC1 : Mips::LDC1; in selectLoadStoreOpCode()
241 return isStore ? Mips::ST_B : Mips::LD_B; in selectLoadStoreOpCode()
243 return isStore ? Mips::ST_H : Mips::LD_H; in selectLoadStoreOpCode()
245 return isStore ? Mips::ST_W : Mips::LD_W; in selectLoadStoreOpCode()
247 return isStore ? Mips::ST_D : Mips::LD_D; in selectLoadStoreOpCode()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/M68k/
DM68kCollapseMOVEMPass.cpp145 bool isStore() const { return Access == AccessTy::Store; } in isStore() function in __anonef4734070111::MOVEMState
209 if (State.isStore() == IsStore && State.getBase() == Reg && in ProcessMI()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp358 bool isStore = Opc == TargetOpcode::G_STORE; in selectLoadStoreOpCode() local
364 return isStore ? Opcodes.STORE8 : Opcodes.LOAD8; in selectLoadStoreOpCode()
366 return isStore ? Opcodes.STORE16 : Opcodes.LOAD16; in selectLoadStoreOpCode()
368 return isStore ? Opcodes.STORE32 : Opcodes.LOAD32; in selectLoadStoreOpCode()
377 return isStore ? ARM::VSTRS : ARM::VLDRS; in selectLoadStoreOpCode()
379 return isStore ? ARM::VSTRD : ARM::VLDRD; in selectLoadStoreOpCode()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
DMachineOperand.cpp1035 assert((isLoad() || isStore()) && "Not a load/store!"); in MachineMemOperand()
1110 assert((isLoad() || isStore()) && in print()
1114 if (isStore()) in print()
1130 OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into "); in print()
1133 OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into "); in print()
1177 OS << ((isLoad() && isStore()) ? " on " in print()
DMachineVerifier.cpp1489 if ((!MMOs[0]->isStore() || MMOs[0]->isLoad()) || in verifyPreISelGenericInstruction()
1490 (MMOs[1]->isStore() || !MMOs[1]->isLoad())) { in verifyPreISelGenericInstruction()
1526 if ((!MMOs[0]->isStore() || MMOs[0]->isLoad())) { in verifyPreISelGenericInstruction()
1655 if (Op->isStore() && !MI->mayStore()) in visitMachineInstrBefore()
2086 if (MMO->isStore()) in visitMachineOperand()
DMachineLICM.cpp408 if (!MemOp->isStore() || !MemOp->getPseudoValue()) in InstructionStoresToFI()
DTargetInstrInfo.cpp382 if ((*o)->isStore() && in hasStoreToStackSlot()
DMachineInstr.cpp1416 if (MMO->isStore()) return false; in isDereferenceableInvariantLoad()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/
DARCInstrInfo.cpp58 static bool isStore(int Opcode) { in isStore() function
90 if (isStore(Opcode)) { in isStoreToStackSlot()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
DSMEInstrFormats.td401 class sme_spill_fill_inst<bit isStore, dag outs, dag ins, string opcodestr>
409 let Inst{21} = isStore;
417 let mayLoad = !not(isStore);
418 let mayStore = isStore;
421 multiclass sme_spill_fill<bit isStore, dag outs, dag ins, string opcodestr> {
422 def NAME : sme_spill_fill_inst<isStore, outs, ins, opcodestr>;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
DEarlyCSE.cpp722 bool isStore() const { in isStore() function in __anon8faea6230311::EarlyCSE::ParseMemoryInst
1127 Value *Result = MemInst.isStore() in getMatchingValue()
1130 if (MemInst.isStore() && InVal.DefInst != Result) in getMatchingValue()
1489 if (MemInst.isValid() && MemInst.isStore()) { in processNode()
1524 if (MemInst.isValid() && MemInst.isStore()) { in processNode()
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/Basic/
DTargetBuiltins.h246 bool isStore() const { return Flags & IsStore; } in isStore() function
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DMachineMemOperand.h299 bool isStore() const { return FlagVals & MOStore; } in isStore() function
DSelectionDAGNodes.h1260 bool writeMem() const { return MMO->isStore(); }
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMInstPrinter.cpp264 bool isStore = Opcode == ARM::STREXD || Opcode == ARM::STLEXD; in printInst() local
265 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
271 if (isStore) in printInst()
278 for (unsigned i = isStore ? 3 : 2; i < MI->getNumOperands(); ++i) in printInst()
/freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/
DCodeGenDAGPatterns.cpp894 return isLoad() || isStore() || isAtomic() || in hasPredCode()
901 if (!isLoad() && !isStore() && !isAtomic()) { in getPredCode()
909 if (!isLoad() && !isStore()) { in getPredCode()
921 if (isLoad() + isStore() + isAtomic() > 1) in getPredCode()
947 if (isStore()) { in getPredCode()
1001 if (isLoad() || isStore() || isAtomic()) { in getPredCode()
1067 if (isLoad() || isStore()) { in getPredCode()
1162 bool TreePredicateFn::isStore() const { in isStore() function in TreePredicateFn
1292 if (isStore()) in getCodeToRunOnSDNode()
DGlobalISelEmitter.cpp344 if (Predicate.isLoad() || Predicate.isStore()) { in isTrivialOperatorNode()
349 if (Predicate.isLoad() || Predicate.isStore() || Predicate.isAtomic()) { in isTrivialOperatorNode()
3804 if (Predicate.isLoad() || Predicate.isStore() || Predicate.isAtomic()) { in addBuiltinPredicates()
3838 if (Predicate.isStore()) { in addBuiltinPredicates()
3876 if (Predicate.isLoad() || Predicate.isStore() || Predicate.isAtomic()) { in addBuiltinPredicates()
3888 if (Predicate.isLoad() || Predicate.isStore()) { in addBuiltinPredicates()
DCodeGenDAGPatterns.h542 bool isStore() const;
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
DVPlan.cpp515 return cast<VPWidenMemoryInstructionRecipe>(this)->isStore(); in mayWriteToMemory()
546 return !cast<VPWidenMemoryInstructionRecipe>(this)->isStore(); in mayReadFromMemory()
1207 if (!isStore()) { in print()
DVPlan.h1518 return isStore() ? getNumOperands() == 3 : getNumOperands() == 2; in isMasked()
1553 bool isStore() const { return isa<StoreInst>(Ingredient); } in isStore() function
1557 assert(isStore() && "Stored value only available for store instructions"); in getStoredValue()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
DAArch64InstructionSelector.cpp789 const bool isStore = GenericOpc == TargetOpcode::G_STORE; in selectLoadStoreUIOp() local
794 return isStore ? AArch64::STRBBui : AArch64::LDRBBui; in selectLoadStoreUIOp()
796 return isStore ? AArch64::STRHHui : AArch64::LDRHHui; in selectLoadStoreUIOp()
798 return isStore ? AArch64::STRWui : AArch64::LDRWui; in selectLoadStoreUIOp()
800 return isStore ? AArch64::STRXui : AArch64::LDRXui; in selectLoadStoreUIOp()
806 return isStore ? AArch64::STRBui : AArch64::LDRBui; in selectLoadStoreUIOp()
808 return isStore ? AArch64::STRHui : AArch64::LDRHui; in selectLoadStoreUIOp()
810 return isStore ? AArch64::STRSui : AArch64::LDRSui; in selectLoadStoreUIOp()
812 return isStore ? AArch64::STRDui : AArch64::LDRDui; in selectLoadStoreUIOp()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
DMemorySanitizer.cpp597 FunctionCallee getKmsanShadowOriginAccessFn(bool isStore, int size);
882 FunctionCallee MemorySanitizer::getKmsanShadowOriginAccessFn(bool isStore, in getKmsanShadowOriginAccessFn() argument
885 isStore ? MsanMetadataPtrForStore_1_8 : MsanMetadataPtrForLoad_1_8; in getKmsanShadowOriginAccessFn()
1516 bool isStore) { in getShadowOriginPtrKernel()
1521 FunctionCallee Getter = MS.getKmsanShadowOriginAccessFn(isStore, Size); in getShadowOriginPtrKernel()
1528 ShadowOriginPtrs = IRB.CreateCall(isStore ? MS.MsanMetadataPtrForStoreN in getShadowOriginPtrKernel()
1542 bool isStore) { in getShadowOriginPtr()
1544 return getShadowOriginPtrKernel(Addr, IRB, ShadowTy, isStore); in getShadowOriginPtr()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DSIInsertWaitcnts.cpp1092 if (Memop->isStore() && SLoadAddresses.count(Ptr)) { in generateWaitcntInstBefore()
1104 if (Memop->isStore()) { in generateWaitcntInstBefore()

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