| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonPseudo.td | 24 let isCodeGenOnly = 0 in 72 isCodeGenOnly = 1 in 77 isCodeGenOnly = 1 in 149 let Defs = [SA0, LC0, USR], isCodeGenOnly = 1, isExtended = 1, 156 let Defs = [SA1, LC1], isCodeGenOnly = 1, isExtended = 1, opExtendable = 0 in { 177 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, Defs = [R16], 181 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, 186 let isCall = 1, hasSideEffects = 1, cofMax1 = 1, isCodeGenOnly = 1 in 199 isExtended = 0, isExtendable = 1, opExtendable = 0, isCodeGenOnly = 1, 234 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in [all …]
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| D | HexagonPatternsV65.td | 10 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 19 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 28 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 41 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 50 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in 59 let isCodeGenOnly = 1, isPseudo = 1, mayLoad = 1, mayStore = 1 in
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| D | HexagonDepInstrInfo.td | 530 let isCodeGenOnly = 1; 568 let isCodeGenOnly = 1; 1461 let isCodeGenOnly = 1; 1477 let isCodeGenOnly = 1; 1604 let isCodeGenOnly = 1; 1619 let isCodeGenOnly = 1; 1665 let isCodeGenOnly = 1; 2172 let isCodeGenOnly = 1; 2280 let isCodeGenOnly = 1; 3733 let isCodeGenOnly = 1; [all …]
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| D | HexagonInstrFormats.td | 215 let isCodeGenOnly = 1, isPseudo = 1 in 221 let isCodeGenOnly = 1, isPseudo = 1 in 227 let isCodeGenOnly = 1, isPseudo = 1 in 251 let isCodeGenOnly = 1; 276 let isCodeGenOnly = 1;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| D | VEInstrVec.td | 10 let hasSideEffects = 0, isCodeGenOnly = 1 in { 27 let hasSideEffects = 0, isCodeGenOnly = 1, DisableEncoding = "$vl" in { 47 let hasSideEffects = 0, isCodeGenOnly = 1 in { 108 isCodeGenOnly = 1 in 114 let isCodeGenOnly = 1, VE_VLInUse = 1 in { 158 let DisableEncoding = "$vl", isCodeGenOnly = 1, VE_VLInUse = 1 in { 213 isCodeGenOnly = 1 in 220 let isCodeGenOnly = 1, VE_VLInUse = 1 in { 273 let DisableEncoding = "$vl", isCodeGenOnly = 1, VE_VLInUse = 1 in { 324 let DisableEncoding = "$vl", isCodeGenOnly = 1, VE_VLInUse = 1 in { [all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrControl.td | 55 let isCodeGenOnly = 1 in 64 let hasSideEffects = 0, isCodeGenOnly = 1, ForceDisassemble = 1 in { 74 isCodeGenOnly = 1, ForceDisassemble = 1 in { 150 let isCodeGenOnly = 1, hasREX_WPrefix = 1 in { 160 let isCodeGenOnly = 1 in { 252 let isCodeGenOnly = 1 in { 291 isCodeGenOnly = 1, Uses = [ESP, SSP] in { 313 isCodeGenOnly = 1, SchedRW = [WriteJump] in 348 let isCodeGenOnly = 1 in { 364 isCodeGenOnly = 1, Uses = [RSP, SSP] in { [all …]
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| D | X86InstrCMovSetCC.td | 16 let isCodeGenOnly = 1, ForceDisassemble = 1 in { 56 } // isCodeGenOnly = 1, ForceDisassemble = 1 76 let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1 in {
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| D | X86InstrExtension.td | 93 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in { 108 } // isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 113 let hasSideEffects = 0, isCodeGenOnly = 1 in { 167 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in { 182 } // isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0
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| D | X86InstrCompiler.td | 185 hasCtrlDep = 1, isCodeGenOnly = 1 in { 193 hasCtrlDep = 1, isCodeGenOnly = 1 in { 201 isCodeGenOnly = 1, isReturn = 1, isEHScopeReturn = 1 in { 211 let hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1, 233 let isBranch = 1, isTerminator = 1, isCodeGenOnly = 1 in { 348 } // isCodeGenOnly 354 let Defs = [ECX,EDI,ESI], Uses = [ECX,EDI,ESI], isCodeGenOnly = 1 in { 373 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in { 393 let Defs = [ECX,EDI], isCodeGenOnly = 1 in { 416 let Defs = [RCX,RDI], isCodeGenOnly = 1 in { [all …]
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| D | X86InstrFMA.td | 240 let Constraints = "$src1 = $dst", isCommutable = 1, isCodeGenOnly = 1, 421 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in 431 let isCodeGenOnly = 1, hasSideEffects = 0, 462 } // isCodeGenOnly = 1 525 let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0 in { 536 } // isCodeGenOnly = 1
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsCondMov.td | 110 let isCodeGenOnly = 1 in { 122 let isCodeGenOnly = 1 in { 133 let isCodeGenOnly = 1 in 140 let isCodeGenOnly = 1 in 156 let isCodeGenOnly = 1 in { 169 let isCodeGenOnly = 1 in 176 let isCodeGenOnly = 1 in
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| D | Mips16InstrInfo.td | 123 let isCodeGenOnly=1; 134 let isCodeGenOnly=1; 143 let isCodeGenOnly=1; 183 let isCodeGenOnly=1; 268 let isCodeGenOnly=1; 280 let isCodeGenOnly=1; 317 let isCodeGenOnly=1; 428 //let isCodeGenOnly=1; 454 let isCodeGenOnly=1; 478 let isCodeGenOnly=1; [all …]
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| D | Mips64InstrInfo.td | 109 let isPseudo = 1, isCodeGenOnly = 1, hasNoSchedulingInfo = 1 in { 127 let isCodeGenOnly = 1 in { 153 let isCodeGenOnly = 1 in { 201 let isCodeGenOnly = 1 in { 226 let isCodeGenOnly = 1 in { 265 let isCodeGenOnly = 1 in { 328 let isCodeGenOnly = 1 in { 367 let isCodeGenOnly = 1 in 406 let isCodeGenOnly = 1, AdditionalPredicates = [NotInMicroMips] in { 414 let isCodeGenOnly = 1, rs = 0, shamt = 0 in { [all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstr64Bit.td | 75 let Interpretation64Bit = 1, isCodeGenOnly = 1 in { 133 let Uses = [RM], isCodeGenOnly = 1 in { 165 let isCodeGenOnly = 1 in { 181 let isCall = 1, PPC970_Unit = 7, isCodeGenOnly = 1, 394 let Interpretation64Bit = 1, isCodeGenOnly = 1 in { 441 let Interpretation64Bit = 1, isCodeGenOnly = 1 in { 573 let isCodeGenOnly = 1 in { 747 } // isCodeGenOnly 804 let Interpretation64Bit = 1, isCodeGenOnly = 1 in 825 let Interpretation64Bit = 1, isCodeGenOnly = 1 in { [all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrCall.td | 19 let Uses = [SP32, SP64], Defs = [SP32, SP64], isCodeGenOnly = 1 in { 24 } // Uses = [SP32, SP64], Defs = [SP32, SP64], isCodeGenOnly = 1
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| D | WebAssemblyInstrControl.td | 20 let isCodeGenOnly = 1 in 103 let isCodeGenOnly = 1 in
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| D | WebAssemblyInstrInfo.td | 274 let hasSideEffects = 1, isCodeGenOnly = 1, Defs = []<Register>, 296 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in 303 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | VOPInstructions.td | 50 let isCodeGenOnly = 1; 75 let isCodeGenOnly = 0; 156 let isCodeGenOnly = 0; 496 let isCodeGenOnly = 1; 532 let isCodeGenOnly = 0; 563 let isCodeGenOnly = 0; 631 let isCodeGenOnly = 1; 670 let isCodeGenOnly = 0;
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| D | R600Instructions.td | 595 let isCodeGenOnly = 1; 658 let isCodeGenOnly = 1; 666 let isCodeGenOnly = 1; 671 let isCodeGenOnly = 1; 689 let isCodeGenOnly = 1, isPseudo = 1 in { 733 } // End isCodeGenOnly = 1, isPseudo = 1 806 let isPseudo = 1, isCodeGenOnly = 1 in { 813 } // end let isPseudo = 1, isCodeGenOnly = 1 816 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in { 827 } // end let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 [all …]
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| D | EXPInstructions.td | 32 let isCodeGenOnly = 1;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.td | 666 isCodeGenOnly = 0, isAsmParserOnly = 1 in 933 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0 in 1009 // Define isCodeGenOnly = 0 to support parsing assembly "call" instruction. 1010 let isCall = 1, isBarrier = 1, isCodeGenOnly = 0, hasSideEffects = 0, 1021 // Define isCodeGenOnly = 0 to support parsing assembly "call" instruction. 1022 let isCall = 1, Defs = [X1], isCodeGenOnly = 0 in 1047 isCodeGenOnly = 0 in 1063 isCodeGenOnly = 0, hasSideEffects = 0, mayStore = 0, mayLoad = 0 in 1068 let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 0, 1073 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isCodeGenOnly = 0, [all …]
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| D | RISCVInstrFormats.td | 188 let isCodeGenOnly = 1; 197 let isCodeGenOnly = 0; 206 let isCodeGenOnly = 0; 216 let isCodeGenOnly = 0;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFP.td | 50 let isCodeGenOnly = 1 in 90 let isCodeGenOnly = 1 in { 104 let isCodeGenOnly = 1 in 144 let isCodeGenOnly = 1 in 342 let isCodeGenOnly = 1 in 353 let isCodeGenOnly = 1 in 364 let isCodeGenOnly = 1 in
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/M68k/ |
| D | M68kInstrControl.td | 239 let isCodeGenOnly = 1 in { 254 } // isCodeGenOnly = 1 266 let isCodeGenOnly = 1 in
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| /freebsd-12-stable/contrib/llvm-project/llvm/utils/TableGen/ |
| D | InstrDocsEmitter.cpp | 133 FLAG(isCodeGenOnly) in EmitInstrDocs()
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