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Searched refs:isARMLowRegister (Results 1 – 10 of 10) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DThumb1InstrInfo.cpp84 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
88 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
113 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) && in loadRegFromStackSlot()
117 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) { in loadRegFromStackSlot()
DThumb2SizeReduction.cpp397 if (!isARMLowRegister(Reg)) in VerifyLowRegs()
472 assert(isARMLowRegister(Rt)); in ReduceLoadStore()
473 assert(isARMLowRegister(Rn)); in ReduceLoadStore()
500 assert(isARMLowRegister(BaseReg)); in ReduceLoadStore()
556 } else if (!isARMLowRegister(BaseReg) || in ReduceLoadStore()
651 if (!isARMLowRegister(MI->getOperand(0).getReg())) in ReduceSpecial()
762 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) in ReduceTo2Addr()
763 || !isARMLowRegister(Reg2)) in ReduceTo2Addr()
787 if (Entry.LowRegs2 && !isARMLowRegister(Reg0)) in ReduceTo2Addr()
796 if (Entry.LowRegs2 && !isARMLowRegister(Reg2)) in ReduceTo2Addr()
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DThumbRegisterInfo.cpp110 assert((isARMLowRegister(DestReg) || DestReg.isVirtual()) && in emitLoadConstPool()
130 bool isHigh = !isARMLowRegister(DestReg) || in emitThumbRegPlusImmInReg()
131 (BaseReg != 0 && !isARMLowRegister(BaseReg)); in emitThumbRegPlusImmInReg()
144 if (!isARMLowRegister(DestReg) && !Register::isVirtualRegister(DestReg)) in emitThumbRegPlusImmInReg()
230 } else if (isARMLowRegister(DestReg)) { in emitThumbRegPlusImmediate()
240 } else if (isARMLowRegister(BaseReg)) { in emitThumbRegPlusImmediate()
DThumb1FrameLowering.cpp381 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitPrologue()
536 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) { in emitEpilogue()
DARMConstantIslandPass.cpp1793 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
1800 if (isARMLowRegister(U.MI->getOperand(0).getReg())) { in optimizeThumb2Instructions()
DARMFrameLowering.cpp2222 isARMLowRegister(Reg) || in determineCalleeSaves()
2256 (!AFI->isThumb1OnlyFunction() || isARMLowRegister(Reg))) { in determineCalleeSaves()
DARMLoadStoreOptimizer.cpp738 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && in CreateLoadStoreMulti()
DARMBaseInstrInfo.cpp5493 if (!isARMLowRegister(Reg)) in findCMPToFoldIntoCBZ()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h160 static inline bool isARMLowRegister(unsigned Reg) { in isARMLowRegister() function
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp1721 return isARMLowRegister(Memory.BaseRegNum) && in isMemThumbRR()
1722 (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum)); in isMemThumbRR()
1727 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs4()
1740 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs2()
1753 !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0) in isMemThumbRIs1()
6752 isARMLowRegister(static_cast<ARMOperand &>(*Operands[3]).getReg()) && in shouldOmitCCOutOperand()
6753 isARMLowRegister(static_cast<ARMOperand &>(*Operands[4]).getReg()) && in shouldOmitCCOutOperand()
6780 (!isARMLowRegister(static_cast<ARMOperand &>(*Operands[3]).getReg()) || in shouldOmitCCOutOperand()
6781 !isARMLowRegister(static_cast<ARMOperand &>(*Operands[4]).getReg()) || in shouldOmitCCOutOperand()
6782 !isARMLowRegister(static_cast<ARMOperand &>(*Operands[5]).getReg()) || in shouldOmitCCOutOperand()
[all …]