| /freebsd-12-stable/sys/dev/drm2/i915/ |
| D | intel_display.c | 934 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_pipe_to_cpu_transcoder() local
936 return intel_crtc->cpu_transcoder; in intel_pipe_to_cpu_transcoder()
1068 struct intel_crtc *crtc, in assert_pch_pll()
1572 static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc) in ironlake_enable_pch_pll() argument
1574 struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private; in ironlake_enable_pch_pll()
1581 pll = intel_crtc->pch_pll; in ironlake_enable_pch_pll()
1590 intel_crtc->base.base.id); in ironlake_enable_pch_pll()
1612 static void intel_disable_pch_pll(struct intel_crtc *intel_crtc) in intel_disable_pch_pll() argument
1614 struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private; in intel_disable_pch_pll()
1615 struct intel_pch_pll *pll = intel_crtc->pch_pll; in intel_disable_pch_pll()
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| D | intel_ddi.c | 172 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in hsw_fdi_link_train() local
186 FDI_RX_PLL_ENABLE | ((intel_crtc->fdi_lanes - 1) << 19); in hsw_fdi_link_train()
196 I915_WRITE(PORT_CLK_SEL(PORT_E), intel_crtc->ddi_pll_sel); in hsw_fdi_link_train()
214 ((intel_crtc->fdi_lanes - 1) << 1) | in hsw_fdi_link_train()
674 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_ddi_mode_set() local
677 int pipe = intel_crtc->pipe; in intel_ddi_mode_set()
709 pipe_name(intel_crtc->pipe)); in intel_ddi_mode_set()
727 pipe_name(intel_crtc->pipe)); in intel_ddi_mode_set()
742 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_ddi_get_crtc_encoder() local
753 intel_crtc->pipe); in intel_ddi_get_crtc_encoder()
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| D | intel_hdmi.c | 180 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in ibx_write_infoframe() local
181 int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe()
196 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in ibx_write_infoframe()
201 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in ibx_write_infoframe()
218 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in cpt_write_infoframe() local
219 int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe()
237 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in cpt_write_infoframe()
242 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in cpt_write_infoframe()
259 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in vlv_write_infoframe() local
260 int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); in vlv_write_infoframe()
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| D | intel_sprite.c | 331 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_enable_primary() local
332 int reg = DSPCNTR(intel_crtc->plane); in intel_enable_primary()
334 if (!intel_crtc->primary_disabled) in intel_enable_primary()
337 intel_crtc->primary_disabled = false; in intel_enable_primary()
348 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_disable_primary() local
349 int reg = DSPCNTR(intel_crtc->plane); in intel_disable_primary()
351 if (intel_crtc->primary_disabled) in intel_disable_primary()
356 intel_crtc->primary_disabled = true; in intel_disable_primary()
423 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_update_plane() local
451 if (intel_plane->pipe != intel_crtc->pipe) in intel_update_plane()
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| D | intel_drv.h | 170 struct intel_crtc *new_crtc;
222 struct intel_crtc { struct
299 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
691 extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
692 extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
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| D | intel_tv.c | 935 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_tv_mode_set() local
946 int pipe = intel_crtc->pipe; in intel_tv_mode_set()
1018 if (intel_crtc->pipe == 1) in intel_tv_mode_set()
1091 int dspcntr_reg = DSPCNTR(intel_crtc->plane); in intel_tv_mode_set()
1098 intel_flush_display_plane(dev_priv, intel_crtc->plane); in intel_tv_mode_set()
1102 intel_wait_for_vblank(dev, intel_crtc->pipe); in intel_tv_mode_set()
1106 intel_wait_for_pipe_off(dev, intel_crtc->pipe); in intel_tv_mode_set()
1127 intel_flush_display_plane(dev_priv, intel_crtc->plane); in intel_tv_mode_set()
1174 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_tv_detect_type() local
1196 if (intel_crtc->pipe == 1) in intel_tv_detect_type()
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| D | intel_lvds.c | 102 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_lvds() local
139 intel_panel_enable_backlight(dev, intel_crtc->pipe); in intel_enable_lvds()
257 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc; in intel_lvds_mode_fixup() local
262 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { in intel_lvds_mode_fixup()
293 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | in intel_lvds_mode_fixup()
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| D | intel_crt.c | 218 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_crt_mode_set() local
236 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); in intel_crt_mode_set()
237 else if (intel_crtc->pipe == 0) in intel_crt_mode_set()
243 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); in intel_crt_mode_set()
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| D | intel_dvo.c | 253 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in intel_dvo_mode_set() local
255 int pipe = intel_crtc->pipe; in intel_dvo_mode_set()
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| D | intel_pm.c | 87 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i8xx_enable_fbc() local
98 plane = intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB; in i8xx_enable_fbc()
120 cfb_pitch, crtc->y, intel_crtc->plane); in i8xx_enable_fbc()
137 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in g4x_enable_fbc() local
138 int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB; in g4x_enable_fbc()
154 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); in g4x_enable_fbc()
206 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in ironlake_enable_fbc() local
207 int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB; in ironlake_enable_fbc()
234 DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); in ironlake_enable_fbc()
398 struct intel_crtc *intel_crtc; in intel_update_fbc() local
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| D | intel_dp.c | 775 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_dp_set_m_n() local
778 int pipe = intel_crtc->pipe; in intel_dp_set_m_n()
779 enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; in intel_dp_set_m_n()
810 intel_dp_compute_m_n(intel_crtc->bpp, lane_count, in intel_dp_set_m_n()
861 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_dp_mode_set() local
901 pipe_name(intel_crtc->pipe)); in intel_dp_mode_set()
920 intel_dp->DP |= intel_crtc->pipe << 29; in intel_dp_mode_set()
939 if (intel_crtc->pipe == 1) in intel_dp_mode_set()
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| D | i915_irq.c | 1480 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i915_pageflip_stall_check() local
1486 if (intel_crtc == NULL) in i915_pageflip_stall_check()
1490 work = intel_crtc->unpin_work; in i915_pageflip_stall_check()
1503 int dspsurf = DSPSURF(intel_crtc->plane); in i915_pageflip_stall_check()
1507 int dspaddr = DSPADDR(intel_crtc->plane); in i915_pageflip_stall_check()
1517 intel_prepare_page_flip(dev, intel_crtc->plane); in i915_pageflip_stall_check()
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| D | intel_sdvo.c | 1074 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_sdvo_mode_set() local
1171 sdvox |= TRANSCODER_CPT(intel_crtc->pipe); in intel_sdvo_mode_set()
1173 sdvox |= TRANSCODER(intel_crtc->pipe); in intel_sdvo_mode_set()
1276 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_sdvo() local
1298 intel_wait_for_vblank(dev, intel_crtc->pipe); in intel_enable_sdvo()
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| D | intel_overlay.c | 175 struct intel_crtc *crtc;
830 struct intel_crtc *crtc) in check_overlay_possible_on_crtc()
1043 struct intel_crtc *crtc; in intel_overlay_put_image()
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| D | i915_debug.c | 295 struct intel_crtc *crtc; in i915_gem_pageflip_info()
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