| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding()
206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding()
208 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
[all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 49 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
63 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
76 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
102 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
111 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
126 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
155 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
159 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
173 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
[all …]
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| D | PPCMCCodeEmitter.h | 105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
734 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
759 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
761 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
775 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
777 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
789 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
791 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
803 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
805 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
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| D | MipsMCCodeEmitter.h | 180 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
| D | VEMCCodeEmitter.cpp | 64 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
99 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in VEMCCodeEmitter
131 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
144 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
154 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCCodeEmitter.cpp | 69 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
118 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
127 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
229 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
242 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter
212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
87 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 46 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
164 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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| D | SIMCCodeEmitter.cpp | 49 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
334 OS.write((uint8_t)getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), in encodeInstruction()
389 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
497 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
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| D | AMDGPUMCCodeEmitter.h | 42 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| D | MSP430MCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| D | CSKYMCCodeEmitter.cpp | 52 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
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| D | CSKYMCCodeEmitter.h | 43 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| D | HexagonMCCodeEmitter.cpp | 713 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRMCCodeEmitter.h | 94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| D | AVRMCCodeEmitter.cpp | 250 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMCCodeEmitter.cpp | 71 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
237 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
208 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 86 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
552 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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