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Searched refs:getLocVT (Results 1 – 25 of 31) sorted by relevance

12

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp238 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
260 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
323 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
326 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
329 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
355 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
416 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
442 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
449 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/
DARCISelLowering.cpp272 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
275 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
278 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
484 EVT RegVT = VA.getLocVT(); in LowerCallArguments()
501 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
510 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCallArguments()
642 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
670 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/
DVEISelLowering.cpp349 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
352 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
355 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
363 assert(VA.getLocVT() == MVT::i64); in LowerReturn()
381 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
423 MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT())); in LowerFormalArguments()
424 SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT()); in LowerFormalArguments()
430 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
434 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
443 assert(VA.getLocVT() == MVT::i64); in LowerFormalArguments()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/
DBPFISelLowering.cpp322 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
355 InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT())); in LowerFormalArguments()
430 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
433 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
436 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
535 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
DMipsCallLowering.cpp170 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
260 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
DMipsISelLowering.cpp3259 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3334 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3336 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3337 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
3506 RVLocs[i].getLocVT(), InFlag); in LowerCallResult()
3512 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
3516 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
3517 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCallResult()
3534 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3540 Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, in LowerCallResult()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
492 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerCCCArguments()
496 << EVT(VA.getLocVT()).getEVTString() << "\n"; in LowerCCCArguments()
505 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp642 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
685 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
688 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
698 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
770 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
836 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
839 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
842 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
DX86FastISel.cpp3318 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3324 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3327 ArgVT = VA.getLocVT(); in fastLowerCall()
3331 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3344 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3347 ArgVT = VA.getLocVT(); in fastLowerCall()
3351 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3353 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3356 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3359 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/M68k/
DM68kISelLowering.cpp316 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) { in MatchingStackOffset()
390 ValVT = VA.getLocVT(); in LowerMemArgument()
592 EVT RegVT = VA.getLocVT(); in LowerCall()
681 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; in LowerCall()
846 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
893 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1038 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1040 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1043 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1045 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1150 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1153 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1156 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1301 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1321 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1324 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1335 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1478 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1506 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DARMCallLowering.cpp117 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
281 uint64_t LocSize = VA.getLocVT().getFixedSizeInBits(); in assignValueToReg()
DARMCallingConv.cpp178 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
DARMFastISel.cpp1900 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1950 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1959 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1966 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
1969 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1982 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
DARMISelLowering.cpp2130 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i32 && in LowerCallResult()
2138 (VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2f64)) { in LowerCallResult()
2153 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
2173 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
2192 Val = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Val); in LowerCallResult()
2211 int Size = VA.getLocVT().getFixedSizeInBits() / 8; in computeAddrForCallArg()
2410 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2413 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2416 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2419 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
DAArch64CallLowering.cpp72 : LLT(VA.getLocVT()); in getStackValueStoreTypeHack()
169 LLT LocTy(VA.getLocVT()); in assignValueToAddress()
298 MVT LocVT = VA.getLocVT(); in assignValueToAddress()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp234 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn()
237 Val = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
240 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
243 Val = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
484 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
487 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
490 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
493 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
504 LargestAlignSeen, Align(VA.getLocVT().getStoreSizeInBits() / 8)); in LowerCall()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp631 const MVT LocVT = VA.getLocVT(); in handleAssignments()
1065 LLT LocTy{VA.getLocVT()}; in extendRegister()
1157 const MVT LocVT = VA.getLocVT(); in assignValueToReg()
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DCallingConvLower.h153 MVT getLocVT() const { return LocVT; } in getLocVT() function
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUCallLowering.cpp35 if (VA.getLocVT().getSizeInBits() < 32) { in extendRegisterMin32()
109 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
117 buildExtensionHint(VA, Copy.getReg(0), LLT(VA.getLocVT())); in assignValueToReg()
DSIISelLowering.cpp1782 MemVT = VA.getLocVT(); in lowerStackParameter()
1796 ExtType, SL, VA.getLocVT(), Chain, FIN, in lowerStackParameter()
2411 MVT VT = VA.getLocVT(); in LowerFormalArguments()
2415 EVT MemVT = VA.getLocVT(); in LowerFormalArguments()
2615 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerReturn()
2618 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2621 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2624 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2632 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
2682 Val = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/
DAVRISelLowering.cpp1159 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1203 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1291 EVT RegVT = VA.getLocVT(); in LowerCall()
1486 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp7020 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
7028 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
7363 if (VA.getValVT().isFixedLengthVector() && VA.getLocVT().isScalableVector()) in convertLocVTToValVT()
7367 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertLocVTToValVT()
7369 else if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertLocVTToValVT()
7385 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
7401 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
7411 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertValVTToLocVT()
7412 Val = DAG.getNode(RISCVISD::FMV_X_ANYEXTH, DL, VA.getLocVT(), Val); in convertValVTToLocVT()
7413 else if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) in convertValVTToLocVT()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp1324 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1327 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1335 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
1351 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1353 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1355 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1359 assert(VA.getLocVT() == MVT::i64); in convertValVTToLocVT()
1362 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VA.getLocVT(), Value, in convertValVTToLocVT()
1447 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1495 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1440 MVT DestVT = VA.getLocVT(); in processCallArgs()
1452 MVT DestVT = VA.getLocVT(); in processCallArgs()
1753 MVT DestVT = VA.getLocVT(); in SelectRet()

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