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Searched refs:fcc (Results 1 – 25 of 26) sorted by relevance

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/freebsd-12-stable/lib/libc/sparc64/fpu/
Dfpu_qp.c94 #define FCC_EQ(fcc) ((fcc) == FSR_CC_EQ) argument
95 #define FCC_GE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_GT) argument
96 #define FCC_GT(fcc) ((fcc) == FSR_CC_GT) argument
97 #define FCC_LE(fcc) ((fcc) == FSR_CC_EQ || (fcc) == FSR_CC_LT) argument
98 #define FCC_LT(fcc) ((fcc) == FSR_CC_LT) argument
99 #define FCC_NE(fcc) ((fcc) != FSR_CC_EQ) argument
100 #define FCC_ID(fcc) (fcc) argument
Dfpu_compare.c95 __fpu_compare(struct fpemu *fe, int cmpe, int fcc) in __fpu_compare() argument
177 fe->fe_fsr = (fe->fe_fsr & fcc_nmask[fcc]) | in __fpu_compare()
178 ((u_long)cc << fcc_shift[fcc]); in __fpu_compare()
Dfpu.c231 u_int32_t insn, int fcc) in __fpu_ccmov() argument
234 if (IF_F4_COND(insn) == fcc) in __fpu_ccmov()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
DMipsInstrFormats.td100 bit hasFCCRegOperand = 0; // Instruction uses $fcc<X> register and is
783 bits<3> fcc;
790 let Inst{20-18} = fcc;
799 bits<3> fcc;
808 let Inst{10-8} = fcc;
835 bits<3> fcc;
841 let Inst{20-18} = fcc;
852 bits<3> fcc;
858 let Inst{20-18} = fcc;
DMipsCondMov.td37 InstSE<(outs RC:$rd), (ins RC:$rs, FCCRegsOpnd:$fcc, RC:$F),
38 !strconcat(opstr, "\t$rd, $rs, $fcc"),
39 [(set RC:$rd, (OpNode RC:$rs, FCCRegsOpnd:$fcc, RC:$F))],
47 InstSE<(outs RC:$fd), (ins RC:$fs, FCCRegsOpnd:$fcc, RC:$F),
48 !strconcat(opstr, "\t$fd, $fs, $fcc"),
49 [(set RC:$fd, (OpNode RC:$fs, FCCRegsOpnd:$fcc, RC:$F))],
DMicroMipsInstrFormats.td453 bits<3> fcc;
460 let Inst{15-13} = fcc;
781 bits<3> fcc;
789 let Inst{15-13} = fcc;
801 bits<3> fcc;
808 let Inst{20-18} = fcc; // cc
846 bits<3> fcc;
852 let Inst{15-13} = fcc; //cc
DMipsInstrFPU.td236 InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset),
237 !strconcat(opstr, "\t$fcc, $offset"),
238 [(MipsFPBrcond Op, FCCRegsOpnd:$fcc, bb:$offset)], Itin,
248 InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset),
249 !strconcat(opstr, "\t$fcc, $offset"), [], Itin,
276 InstSE<(outs FCCRegsOpnd:$fcc), (ins RC:$fs, RC:$ft),
277 !strconcat("c.", CondStr, ".", Typestr, "\t$fcc, $fs, $ft"), [], itin,
745 // fcc register set is used directly.
746 bits<3> fcc = 0;
752 // fcc register set is used directly.
[all …]
DMicroMipsInstrFPU.td59 // fcc register set is used directly.
60 bits<3> fcc = 0;
67 // fcc register set is used directly.
68 bits<3> fcc = 0;
DMipsRegisterInfo.td201 def FCC#I : MipsReg<I, "fcc"#I>;
/freebsd-12-stable/contrib/gcclibs/libcpp/
Ducnid.tab33 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
134 1f5d 1f5f-1f7d 1f80-1fb4 1fb6-1fbc 1fc2-1fc4 1fc6-1fcc 1fd0-1fd3
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
DSparcInstrAliases.td45 // mov<cond> %fcc[0-3], rs2, rd
49 // mov<cond> %fcc[0-3], simm11, rd
53 // fmovs<cond> %fcc[0-3], $rs2, $rd
57 // fmovd<cond> %fcc[0-3], $rs2, $rd
/freebsd-12-stable/crypto/heimdal/
DChangeLog.20041107 functions: address list, config file, use admin kdc, fcc version
1224 [libdefaults]fcc-mit-ticketflags=boolean
1227 [libdefaults]fcc-mit-ticketflags=boolean to decide what format to
1228 write the fcc in. Default to mit version (aka heimdal 0.7)
DChangeLog.2005151 to return NULL when its not found, and fcc when the name starts
522 fcc-mit-ticketflags.
526 * lib/krb5/krb5_keytab.3: Document fcc-mit-ticketflags in
/freebsd-12-stable/usr.sbin/bsnmpd/modules/snmp_wlan/
Dwlan_tree.def49 1 fcc
DBEGEMOT-WIRELESS-MIB.txt173 fcc(1),
/freebsd-12-stable/contrib/binutils/opcodes/
DChangeLog-2006530 * mips-dis.c (print_insn_args): Print $fcc only for FP
/freebsd-12-stable/contrib/gcc/config/sparc/
Dsparc.md133 (define_attr "branch_type" "none,icc,fcc,reg"
187 (eq_attr "branch_type" "fcc")
1612 (set_attr "branch_type" "fcc")])
1629 (set_attr "branch_type" "fcc")])
1646 (set_attr "branch_type" "fcc")])
1663 (set_attr "branch_type" "fcc")])
/freebsd-12-stable/contrib/gcc/
DFSFChangeLog2234 * i386.md (mov[sdx]fcc): Disable for now.
DFSFChangeLog.116579 (mov[sd]fcc*): Make operand[0,2] s_register_operands, and operand3
9918 * mips.md (mov[sd]fcc): Use register_operand, not reg_or_0_operand,
DChangeLog-200126115 * i386.md (sse_movdfcc_eq): Fix constraint (sse_mov?fcc splitter): Use operands_match_p
27145 * i386.md (sse_mov?fcc): Disallow EQ and NE in IEEE mode.
28695 * i386.md (sse_mov?fcc*): New patterns and splitters.
DChangeLog-200220369 (sse_mov?fcc split): abort if op2 == op3.
24114 * i386.md (sse_mov?fcc*): Revert patch of Mar 14th.
25236 * i386.md (sse_mov?fcc*): Swap operands for cases they will be swapped
DFSFChangeLog.10606 Use SPARC_FCC_REG. Don't treat reg 0 as an fcc reg. Don't match
DChangeLog-20037140 * config/sparc/sparc.md (length attribute) [fcc branch]: Add 1 to
33640 * config/i386/i386.md (sse_mov?fcc split): Handle op2 == op3 case
/freebsd-12-stable/contrib/binutils/gas/
DChangeLog-02033873 * config/tc-mips.c (md_begin): Add $fcc registers to the symbol
/freebsd-12-stable/share/misc/
Dpci_vendors23284 1fcc StreamLabs
30837 6fcc Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D Power Control Unit

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