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Searched refs:csr (Results 1 – 25 of 67) sorted by relevance

123

/freebsd-12-stable/sys/sparc64/sbus/
Dlsi64854.c130 uint32_t csr; in lsi64854_attach() local
190 csr = L64854_GCSR(sc); in lsi64854_attach()
191 sc->sc_rev = csr & L64854_DEVID; in lsi64854_attach()
215 DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr)); in lsi64854_attach()
254 uint32_t csr; \
267 csr = L64854_GCSR(sc); \
269 csr |= D_ESC_DRAIN; \
271 csr |= L64854_INVALIDATE; \
273 L64854_SCSR(sc, csr); \
284 uint32_t csr; \
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Dlsi64854var.h70 #define L64854_SCSR(sc, csr) bus_write_4((sc)->sc_res, L64854_REG_CSR, csr) argument
81 uint32_t csr = L64854_GCSR(sc); \
82 csr |= L64854_INT_EN; \
83 L64854_SCSR(sc, csr); \
89 uint32_t csr = L64854_GCSR(sc); \
90 csr |= D_EN_DMA; \
91 L64854_SCSR(sc, csr); \
Ddma_sbus.c181 uint32_t csr; in dma_attach() local
211 csr = L64854_GCSR(lsc); in dma_attach()
215 csr |= E_TP_AUI; in dma_attach()
218 csr &= ~E_TP_AUI; in dma_attach()
220 csr |= E_TP_AUI; in dma_attach()
223 L64854_SCSR(lsc, csr); in dma_attach()
/freebsd-12-stable/sys/powerpc/booke/
Dmachdep_e500.c64 uint32_t csr; in booke_enable_l1_cache() local
67 csr = mfspr(SPR_L1CSR0); in booke_enable_l1_cache()
68 if ((csr & L1CSR0_DCE) == 0) { in booke_enable_l1_cache()
73 csr = mfspr(SPR_L1CSR0); in booke_enable_l1_cache()
74 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR0_DCE) == 0) in booke_enable_l1_cache()
76 (csr & L1CSR0_DCE) ? "en" : "dis"); in booke_enable_l1_cache()
79 csr = mfspr(SPR_L1CSR1); in booke_enable_l1_cache()
80 if ((csr & L1CSR1_ICE) == 0) { in booke_enable_l1_cache()
85 csr = mfspr(SPR_L1CSR1); in booke_enable_l1_cache()
86 if ((boothowto & RB_VERBOSE) != 0 || (csr & L1CSR1_ICE) == 0) in booke_enable_l1_cache()
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Dmp_cpudep.c55 uint32_t msr, csr; in cpudep_ap_bootstrap() local
59 csr = mfspr(SPR_L1CSR0); in cpudep_ap_bootstrap()
60 if ((csr & L1CSR0_DCE) == 0) { in cpudep_ap_bootstrap()
65 csr = mfspr(SPR_L1CSR1); in cpudep_ap_bootstrap()
66 if ((csr & L1CSR1_ICE) == 0) { in cpudep_ap_bootstrap()
/freebsd-12-stable/sys/riscv/include/
Driscvreg.h195 #define csr_swap(csr, val) \ argument
197 __asm __volatile("csrrwi %0, " #csr ", %1" \
200 __asm __volatile("csrrw %0, " #csr ", %1" \
205 #define csr_write(csr, val) \ argument
207 __asm __volatile("csrwi " #csr ", %0" :: "i" (val)); \
209 __asm __volatile("csrw " #csr ", %0" :: "r" (val)); \
212 #define csr_set(csr, val) \ argument
214 __asm __volatile("csrsi " #csr ", %0" :: "i" (val)); \
216 __asm __volatile("csrs " #csr ", %0" :: "r" (val)); \
219 #define csr_clear(csr, val) \ argument
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/freebsd-12-stable/sys/dev/usb/controller/
Dmusb_otg.c407 uint8_t csr; in musbotg_dev_ctrl_setup_rx() local
425 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
427 DPRINTFN(4, "csr=0x%02x\n", csr); in musbotg_dev_ctrl_setup_rx()
433 if (csr & MUSB2_MASK_CSR0L_DATAEND) { in musbotg_dev_ctrl_setup_rx()
441 if (csr & MUSB2_MASK_CSR0L_SENTSTALL) { in musbotg_dev_ctrl_setup_rx()
445 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
449 if (csr & MUSB2_MASK_CSR0L_SETUPEND) { in musbotg_dev_ctrl_setup_rx()
454 csr = MUSB2_READ_1(sc, MUSB2_REG_TXCSRL); in musbotg_dev_ctrl_setup_rx()
462 if (!(csr & MUSB2_MASK_CSR0L_RXPKTRDY)) { in musbotg_dev_ctrl_setup_rx()
533 uint8_t csr, csrh; in musbotg_host_ctrl_setup_tx() local
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/freebsd-12-stable/sys/sparc64/pci/
Dpsychoreg.h220 #define PSYCHO_GCSR_IMPL(csr) ((u_int)(((csr) >> 60) & 0xf)) argument
221 #define PSYCHO_GCSR_VERS(csr) ((u_int)(((csr) >> 56) & 0xf)) argument
222 #define PSYCHO_GCSR_MID(csr) ((u_int)(((csr) >> 51) & 0x1f)) argument
223 #define PSYCHO_GCSR_IGN(csr) ((u_int)(((csr) >> 46) & 0x1f)) argument
Dpsycho.c291 uint64_t csr, dr; in psycho_attach() local
368 csr = PSYCHO_READ8(sc, PSR_CS); in psycho_attach()
369 ver = PSYCHO_GCSR_VERS(csr); in psycho_attach()
372 sc->sc_ign = PSYCHO_GCSR_IGN(csr); in psycho_attach()
378 desc->pd_name, (u_int)PSYCHO_GCSR_IMPL(csr), ver, sc->sc_ign, in psycho_attach()
383 csr = PCICTL_READ8(sc, PCR_CS); in psycho_attach()
384 csr &= ~PCICTL_ARB_PARK; in psycho_attach()
386 csr |= PCICTL_ARB_PARK; in psycho_attach()
397 csr &= ~PCICTL_ARB_PARK; in psycho_attach()
408 csr |= PCICTL_ERRINTEN | PCICTL_ARB_4; in psycho_attach()
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/freebsd-12-stable/sys/dev/mk48txx/
Dmk48txx.c165 uint8_t csr; in mk48txx_gettime() local
172 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_gettime()
173 csr |= MK48TXX_CSR_READ; in mk48txx_gettime()
174 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); in mk48txx_gettime()
207 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_gettime()
208 csr &= ~MK48TXX_CSR_READ; in mk48txx_gettime()
209 (*sc->sc_nvwr)(dev, clkoff + MK48TXX_ICSR, csr); in mk48txx_gettime()
225 uint8_t csr; in mk48txx_settime() local
239 csr = (*sc->sc_nvrd)(dev, clkoff + MK48TXX_ICSR); in mk48txx_settime()
240 csr |= MK48TXX_CSR_WRITE; in mk48txx_settime()
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/freebsd-12-stable/sys/gnu/dts/arm64/apm/
Dapm-storm.dtsi187 reg-names = "csr-reg", "div-reg";
188 csr-offset = <0x0>;
189 csr-mask = <0x2>;
216 reg-names = "csr-reg";
225 reg-names = "csr-reg";
226 csr-mask = <0xa>;
236 reg-names = "csr-reg";
237 csr-mask = <0x3>;
247 reg-names = "csr-reg";
248 csr-mask = <0x3>;
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Dapm-shadowcat.dtsi325 reg-names = "csr-reg", "div-reg";
326 csr-offset = <0x0>;
327 csr-mask = <0x2>;
341 reg-names = "csr-reg";
350 reg-names = "csr-reg";
359 reg-names = "csr-reg";
361 csr-mask = <0x3>;
370 reg-names = "csr-reg";
372 csr-mask = <0x3>;
381 reg-names = "csr-reg";
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/freebsd-12-stable/sys/dev/sound/sbus/
Dcs4231.c741 u_int32_t csr; in cs4231_sbus_intr() local
747 csr = APC_READ(sc, APC_CSR); in cs4231_sbus_intr()
748 if ((csr & APC_CSR_GI) == 0) { in cs4231_sbus_intr()
752 APC_WRITE(sc, APC_CSR, csr); in cs4231_sbus_intr()
754 if ((csr & APC_CSR_EIE) && (csr & APC_CSR_EI)) { in cs4231_sbus_intr()
761 if ((csr & APC_CSR_PMIE) && (csr & APC_CSR_PMI)) { in cs4231_sbus_intr()
776 if ((csr & APC_CSR_CIE) && (csr & APC_CSR_CI) && (csr & APC_CSR_CD)) { in cs4231_sbus_intr()
803 u_int32_t csr; in cs4231_ebus_pintr() local
809 csr = EBDMA_P_READ(sc, EBDMA_DCSR); in cs4231_ebus_pintr()
810 if ((csr & EBDCSR_INT) == 0) { in cs4231_ebus_pintr()
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/freebsd-12-stable/sys/contrib/octeon-sdk/
Dcvmx-helper.h95 chcsr_type csr; \
97 csr.u64 = cvmx_read_csr(chcsr_csr); \
99 csr.u64 = (chcsr_init); \
100 csr.chcsr_chip.chcsr_fld = (chcsr_val); \
101 cvmx_write_csr((chcsr_csr), csr.u64); \
/freebsd-12-stable/sys/dev/iicbus/
Dnxprtc.c443 struct csr { in pcf8523_start() struct
448 } csr; in pcf8523_start() local
453 if ((err = nxprtc_readfrom(sc->dev, PCF85xx_R_CS1, &csr, in pcf8523_start()
454 sizeof(csr), WAITFLAGS)) != 0){ in pcf8523_start()
465 if ((csr.cs3 & PCF8523_M_CS3_PM) == PCF8523_B_CS3_PM_NOBAT || in pcf8523_start()
466 (csr.cs1 & PCF85xx_B_CS1_STOP) || (csr.sec & PCF85xx_B_SECOND_OS)) { in pcf8523_start()
531 if (csr.cs1 & PCF2129_B_CS1_12HR) in pcf8523_start()
549 if (csr.cs1 & PCF8523_B_CS1_12HR) in pcf8523_start()
617 struct csr { in pcf8563_start() struct
621 } csr; in pcf8563_start() local
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/freebsd-12-stable/sys/powerpc/mpc85xx/
Dmpc85xx.c297 uint32_t csr, size, ver; in mpc85xx_enable_l3_cache() local
303 csr = ccsr_read4(OCP85XX_CPC_CSR0); in mpc85xx_enable_l3_cache()
304 if ((csr & OCP85XX_CPC_CSR0_CE) == 0) { in mpc85xx_enable_l3_cache()
309 csr = ccsr_read4(OCP85XX_CPC_CSR0); in mpc85xx_enable_l3_cache()
311 (csr & OCP85XX_CPC_CSR0_CE) == 0) { in mpc85xx_enable_l3_cache()
314 size, (csr & OCP85XX_CPC_CSR0_CE) == 0 ? in mpc85xx_enable_l3_cache()
/freebsd-12-stable/sys/dev/mii/
Dlxtphy.c198 int bmcr, bmsr, csr; in lxtphy_status() local
208 csr = PHY_READ(sc, MII_LXTPHY_CSR); in lxtphy_status()
209 if (csr & CSR_LINK) in lxtphy_status()
229 if (csr & CSR_SPEED) in lxtphy_status()
233 if (csr & CSR_DUPLEX) in lxtphy_status()
/freebsd-12-stable/sys/dev/de/
Dif_de.c1703 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); in tulip_21140_smc9332_media_probe() local
1704 …if ((csr & (TULIP_GP_SMC_9332_OK10|TULIP_GP_SMC_9332_OK100)) == (TULIP_GP_SMC_9332_OK10|TULIP_GP_S… in tulip_21140_smc9332_media_probe()
1707 } else if ((csr & TULIP_GP_SMC_9332_OK10) == 0) { in tulip_21140_smc9332_media_probe()
1805 u_int32_t csr = TULIP_CSR_READ(sc, csr_gp); in tulip_21140_znyx_zx34x_media_probe() local
1806 …if ((csr & (TULIP_GP_ZX34X_LNKFAIL|TULIP_GP_ZX34X_SYMDET|TULIP_GP_ZX34X_SIGDET)) == (TULIP_GP_ZX34… in tulip_21140_znyx_zx34x_media_probe()
1809 } else if ((csr & TULIP_GP_ZX34X_LNKFAIL) == 0) { in tulip_21140_znyx_zx34x_media_probe()
1866 #define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
1871 unsigned bit, csr; in tulip_srom_idle() local
1873 csr = SROMSEL ; EMIT; in tulip_srom_idle()
1874 csr = SROMSEL | SROMRD; EMIT; in tulip_srom_idle()
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/freebsd-12-stable/sys/arm/ti/
Dti_sdma.c221 uint32_t csr; in ti_sdma_intr() local
241 csr = ti_sdma_read_4(sc, DMA4_CSR(ch)); in ti_sdma_intr()
242 if (csr == 0) { in ti_sdma_intr()
256 if (csr & DMA4_CSR_DROP) in ti_sdma_intr()
260 if (csr & DMA4_CSR_SECURE_ERR) in ti_sdma_intr()
263 if (csr & DMA4_CSR_MISALIGNED_ADRS_ERR) in ti_sdma_intr()
266 if (csr & DMA4_CSR_TRANS_ERR) { in ti_sdma_intr()
283 channel->callback(ch, csr, channel->callback_data); in ti_sdma_intr()
587 uint32_t csr; in ti_sdma_get_channel_status() local
602 csr = ti_sdma_read_4(sc, DMA4_CSR(ch)); in ti_sdma_get_channel_status()
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/freebsd-12-stable/sys/dev/ppc/
Dppc.c709 int csr = SMC66x_CSR; /* initial value is 0x3F0 */ in ppc_smc37c66xgt_detect() local
714 #define cio csr+1 /* config IO port is either 0x3F1 or 0x371 */ in ppc_smc37c66xgt_detect()
720 outb(csr, SMC665_iCODE); in ppc_smc37c66xgt_detect()
721 outb(csr, SMC665_iCODE); in ppc_smc37c66xgt_detect()
724 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
732 outb(csr, SMC666_iCODE); in ppc_smc37c66xgt_detect()
733 outb(csr, SMC666_iCODE); in ppc_smc37c66xgt_detect()
736 outb(csr, 0xd); in ppc_smc37c66xgt_detect()
743 csr = SMC666_CSR; in ppc_smc37c66xgt_detect()
751 outb(csr, 0xaa); /* end config mode */ in ppc_smc37c66xgt_detect()
[all …]
/freebsd-12-stable/sys/dev/wpi/
Dif_wpi_debug.h103 static const char *wpi_get_csr_string(size_t csr) in wpi_get_csr_string() argument
105 switch (csr) { in wpi_get_csr_string()
122 KASSERT(0, ("Unknown CSR: %d\n", csr)); in wpi_get_csr_string()
/freebsd-12-stable/sys/dev/le/
Dif_le_ledma.c222 uint32_t aui_bit, csr; in le_dma_hwreset() local
227 csr = L64854_GCSR(dma); in le_dma_hwreset()
228 aui_bit = csr & E_TP_AUI; in le_dma_hwreset()
241 csr = L64854_GCSR(dma); in le_dma_hwreset()
242 csr |= (E_DSBL_WR_INVAL | aui_bit); in le_dma_hwreset()
243 L64854_SCSR(dma, csr); in le_dma_hwreset()
/freebsd-12-stable/contrib/wpa/src/crypto/
Dcrypto.h1221 void crypto_csr_deinit(struct crypto_csr *csr);
1229 int crypto_csr_set_ec_public_key(struct crypto_csr *csr,
1239 int crypto_csr_set_name(struct crypto_csr *csr, enum crypto_csr_name type,
1251 int crypto_csr_set_attribute(struct crypto_csr *csr, enum crypto_csr_attr attr,
1262 const u8 * crypto_csr_get_attribute(struct crypto_csr *csr,
1274 struct wpabuf * crypto_csr_sign(struct crypto_csr *csr,
/freebsd-12-stable/sys/dev/oce/
Doce_hw.c59 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
64 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc), post_status.dw0); in oce_POST()
74 post_status.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_SEMAPHORE(sc)); in oce_POST()
464 ctrl.dw0 = OCE_READ_CSR_MPU(sc, csr, MPU_EP_CONTROL); in oce_pci_soft_reset()
466 OCE_WRITE_CSR_MPU(sc, csr, MPU_EP_CONTROL, ctrl.dw0); in oce_pci_soft_reset()
/freebsd-12-stable/tools/bus_space/examples/
Dam79c900_diag.py273 csr = rdcsr(0) variable
274 while (csr & 0x100) == 0:
275 logging.debug('CSR=%#x' % (csr))
276 csr = rdcsr(0) variable

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