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Searched refs:cclk (Results 1 – 17 of 17) sorted by relevance

/freebsd-12-stable/sys/gnu/dts/arm/
Dstm32mp153.dtsi27 clock-names = "hclk", "cclk";
40 clock-names = "hclk", "cclk";
Ddra76x.dtsi36 clock-names = "cclk", "hclk";
Dsama5d2.dtsi730 clock-names = "hclk", "cclk";
955 clock-names = "hclk", "cclk";
/freebsd-12-stable/sys/dev/cxgbe/common/
Dcommon.h267 unsigned int cclk; member
521 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
527 return (us * adap->params.vpd.cclk) / 1000; in us_to_core_ticks()
534 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / in core_ticks_to_us()
535 adapter->params.vpd.cclk); in core_ticks_to_us()
547 return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre); in us_to_tcp_ticks()
Dt4vf_hw.c377 adapter->params.vpd.cclk = 50000; in t4vf_prep_adapter()
Dt4_hw.c6458 unsigned int clk = adap->params.vpd.cclk * 1000; in t4_set_sched_bps()
6532 u64 v = (u64)bytes256 * adap->params.vpd.cclk; in chan_rate()
9314 adapter->params.vpd.cclk = 50000; in t4_prep_adapter()
10314 v = (adap->params.vpd.cclk * 1000) / cpt; /* ticks/s */ in t4_get_tx_sched()
/freebsd-12-stable/sys/dev/sound/pci/
Denvy24ht.c122 u_int32_t cdti, cclk, cs; member
653 buff->cclk = 0x80000; in envy24ht_rom2cfg()
894 int cs, cclk, cdti; member
898 envy24ht_spi_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) in envy24ht_spi_ctl() argument
904 device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti); in envy24ht_spi_ctl()
907 data &= ~(ptr->cs | ptr->cclk | ptr->cdti); in envy24ht_spi_ctl()
909 if (cclk) data += ptr->cclk; in envy24ht_spi_ctl()
979 ptr->cclk = ptr->parent->cfg->cclk; in envy24ht_spi_init()
Denvy24.c113 u_int8_t cdti, cclk, cs, cif, type; member
805 int cs, cclk, cdti; member
913 envy24_delta_ak4524_ctl(void *codec, unsigned int cs, unsigned int cclk, unsigned int cdti) in envy24_delta_ak4524_ctl() argument
919 device_printf(ptr->parent->dev, "--> %d, %d, %d\n", cs, cclk, cdti); in envy24_delta_ak4524_ctl()
922 data &= ~(ptr->cs | ptr->cclk | ptr->cdti); in envy24_delta_ak4524_ctl()
924 if (cclk) data += ptr->cclk; in envy24_delta_ak4524_ctl()
1013 ptr->cclk = ENVY24_GPIO_AK4524_CCLK; in envy24_delta_ak4524_init()
1015 ptr->cclk = ptr->parent->cfg->cclk; in envy24_delta_ak4524_init()
/freebsd-12-stable/sys/dev/cxgb/common/
Dcxgb_t3_hw.c253 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1; in mi1_init()
628 VPD_ENTRY(cclk, 6); /* core clock */
883 p->cclk = simple_strtoul(vpd.cclk_data, NULL, 10); in get_vpd_params()
3695 unsigned int clk = adap->params.vpd.cclk * 1000; in t3_config_sched()
3782 v = (adap->params.vpd.cclk * 1000) / cpt; in t3_get_tx_sched()
3812 tp_set_timers(adap, adap->params.vpd.cclk * 1000); in tp_init()
4367 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); in early_hw_init()
4518 p->tre = fls(adapter->params.vpd.cclk / (1000 / TP_TMR_RES)) - in t3_prep_adapter()
4520 p->dack_re = fls(adapter->params.vpd.cclk / 10) - 1; /* 100us */ in t3_prep_adapter()
Dcxgb_common.h351 unsigned int cclk; member
664 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
Dcxgb_xgmac.c535 thres = (adap->params.vpd.cclk * 1000) / 15625; in t3_mac_set_mtu()
/freebsd-12-stable/sys/dev/cxgbe/
Dt4_vf.c213 sc->params.vpd.cclk = val[2]; in get_params__pre_init()
Dt4_main.c4211 sc->params.vpd.cclk = val[1]; in get_params__pre_init()
6158 sc->params.vpd.cclk, "core clock frequency (in KHz)"); in t4_sysctls()
9663 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_tick()
9693 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_dack_timer()
9709 u_int cclk_ps = 1000000000 / sc->params.vpd.cclk; in sysctl_tp_timer()
Dt4_sge.c692 int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk; in t4_tweak_chip_settings()
1562 return (n / sc->params.vpd.cclk * 1000000); in last_flit_to_ns()
1564 return (n * 1000000 / sc->params.vpd.cclk); in last_flit_to_ns()
/freebsd-12-stable/sys/dev/cxgbe/cudbg/
Dcudbg_lib.c1212 if (!padap->params.vpd.cclk) { in collect_clk_info()
1224 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* in ps in collect_clk_info()
1493 if (!padap->params.vpd.cclk) { in collect_hw_sched()
/freebsd-12-stable/sys/dev/cxgbe/firmware/
Dt6fw_cfg_fpga.txt99 #DBQ Timer duration = 1 cclk cycle duration * (sge_dbq_timertick+1) * sge_dbq_timer
/freebsd-12-stable/sys/dev/cxgb/
Dcxgb_sge.c3415 CTLFLAG_RD, &sc->params.vpd.cclk, in t3_add_attach_sysctls()