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Searched refs:bus_read_4 (Results 1 – 25 of 292) sorted by relevance

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/freebsd-12-stable/sys/arm64/coresight/
Dcoresight-tmc.c91 if (bus_read_4(sc->res, TMC_CTL) & CTL_TRACECAPTEN) in tmc_start()
96 if ((bus_read_4(sc->res, TMC_CTL) & CTL_TRACECAPTEN) == 0) in tmc_start()
100 reg = bus_read_4(sc->res, TMC_STS); in tmc_start()
103 if ((bus_read_4(sc->res, TMC_CTL) & CTL_TRACECAPTEN) == 0) in tmc_start()
117 reg = bus_read_4(sc->res, TMC_CTL); in tmc_stop()
122 reg = bus_read_4(sc->res, TMC_STS); in tmc_stop()
137 reg = bus_read_4(sc->res, TMC_STS); in tmc_configure_etf()
147 bus_read_4(sc->res, TMC_STS), in tmc_configure_etf()
148 bus_read_4(sc->res, TMC_CTL), in tmc_configure_etf()
149 bus_read_4(sc->res, TMC_RSZ), in tmc_configure_etf()
[all …]
Dcoresight-etm4x.c157 reg = bus_read_4(sc->res, TRCVIIECTLR); in etm_prepare()
199 reg = bus_read_4(sc->res, TRCIDR(1)); in etm_init()
223 reg = bus_read_4(sc->res, TRCSTATR); in etm_enable()
226 if ((bus_read_4(sc->res, TRCPRGCTLR) & TRCPRGCTLR_EN) == 0) in etm_enable()
246 reg = bus_read_4(sc->res, TRCSTATR); in etm_disable()
Dcoresight-funnel.c85 dprintf("Device ID: %x\n", bus_read_4(sc->res, FUNNEL_DEVICEID)); in funnel_init()
99 reg = bus_read_4(sc->res, FUNNEL_FUNCTL); in funnel_enable()
117 reg = bus_read_4(sc->res, FUNNEL_FUNCTL); in funnel_disable()
/freebsd-12-stable/sys/powerpc/powermac/
Datibl.c175 (void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); in atibl_pll_rreg()
176 (void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL); in atibl_pll_rreg()
178 data = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); in atibl_pll_rreg()
181 save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); in atibl_pll_rreg()
184 tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); in atibl_pll_rreg()
197 (void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); in atibl_pll_wreg()
198 (void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL); in atibl_pll_wreg()
204 save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); in atibl_pll_wreg()
207 tmp = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); in atibl_pll_wreg()
225 lvds_gen_cntl = bus_read_4(sc->sc_memr, RADEON_LVDS_GEN_CNTL); in atibl_setlevel()
[all …]
/freebsd-12-stable/sys/dev/sdhci/
Dsdhci_xenon.c145 val32 = bus_read_4(sc->mem_res, off); in sdhci_xenon_read_4()
211 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); in sdhci_xenon_phy_init()
228 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); in sdhci_xenon_phy_init()
236 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); in sdhci_xenon_phy_init()
257 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL); in sdhci_xenon_phy_set()
265 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL1); in sdhci_xenon_phy_set()
274 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_TIMING_ADJUST); in sdhci_xenon_phy_set()
283 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_PAD_CONTROL2); in sdhci_xenon_phy_set()
289 reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL); in sdhci_xenon_phy_set()
293 reg = bus_read_4(sc->mem_res, XENON_EMMC_PHY_FUNC_CONTROL); in sdhci_xenon_phy_set()
[all …]
/freebsd-12-stable/sys/sparc64/fhc/
Dfhc.c197 board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR); in fhc_attach()
216 (void)bus_read_4(sc->sc_memres[i], FHC_ICLR); in fhc_attach()
221 sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0); in fhc_attach()
223 ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); in fhc_attach()
228 (void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL); in fhc_attach()
260 (u_long)bus_read_4(fica->fica_memres, FHC_IMAP), in fhc_attach()
261 (u_long)bus_read_4(fica->fica_memres, FHC_ICLR)); in fhc_attach()
270 INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))), in fhc_attach()
368 (void)bus_read_4(fica->fica_memres, FHC_IMAP); in fhc_intr_enable()
378 (void)bus_read_4(fica->fica_memres, FHC_IMAP); in fhc_intr_disable()
[all …]
/freebsd-12-stable/sys/arm/ti/omap4/
Domap4_prcm_clks.c536 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_activate()
547 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_activate()
602 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_deactivate()
668 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_generic_accessible()
790 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_gptimer_get_source_freq()
848 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_hsmmc_set_source()
904 clksel = bus_read_4(clk_mem_res, clk_details->clksel_reg); in omap4_clk_hsmmc_get_source_freq()
949 clksel = bus_read_4(sc->sc_res, CM_SYS_CLKSEL_OFFSET); in omap4_clk_get_sysclk_freq()
1010 clksel = bus_read_4(sc->sc_res, CM_CLKSEL_DPLL_MPU); in omap4_clk_get_arm_fclk_freq()
1106 clksel = bus_read_4(clk_mem_res, clksel_reg_off); in omap4_clk_hsusbhost_activate()
[all …]
/freebsd-12-stable/sys/dev/bhnd/cores/usb/
Dbhnd_usb.c157 tmp = bus_read_4(sc->sc_mem, 0x400) & ~0x8; in bhnd_usb_attach()
159 tmp = bus_read_4(sc->sc_mem, 0x400); in bhnd_usb_attach()
163 tmp = bus_read_4(sc->sc_mem, 0x304) & ~0x100; in bhnd_usb_attach()
165 tmp = bus_read_4(sc->sc_mem, 0x304); in bhnd_usb_attach()
189 bus_read_4(sc->sc_mem, 0x524); in bhnd_usb_attach()
193 bus_read_4(sc->sc_mem, 0x524); in bhnd_usb_attach()
197 bus_read_4(sc->sc_mem, 0x524); in bhnd_usb_attach()
201 bus_read_4(sc->sc_mem, 0x524); in bhnd_usb_attach()
206 tmp = bus_read_4(sc->sc_mem, 0x528); in bhnd_usb_attach()
212 tmp = bus_read_4(sc->sc_mem, 0x528); in bhnd_usb_attach()
[all …]
/freebsd-12-stable/sys/powerpc/mpc85xx/
Dqoriq_gpio.c140 reg = bus_read_4(sc->sc_mem, GPIO_GPDIR); in qoriq_gpio_pin_setflags()
145 reg = bus_read_4(sc->sc_mem, GPIO_GPDIR); in qoriq_gpio_pin_setflags()
148 reg = bus_read_4(sc->sc_mem, GPIO_GPODR); in qoriq_gpio_pin_setflags()
173 outvals = bus_read_4(sc->sc_mem, GPIO_GPDAT); in qoriq_gpio_pin_set()
192 *value = (bus_read_4(sc->sc_mem, GPIO_GPDAT) >> (31 - pin)) & 1; in qoriq_gpio_pin_get()
209 val = bus_read_4(sc->sc_mem, GPIO_GPDAT); in qoriq_gpio_pin_toggle()
Dmpc85xx_gpio.c134 outvals = bus_read_4(sc->out_res, 0); in mpc85xx_gpio_pin_set()
153 *value = (bus_read_4(sc->in_res, 0) >> (31 - pin)) & 1; in mpc85xx_gpio_pin_get()
170 val = bus_read_4(sc->out_res, 0); in mpc85xx_gpio_pin_toggle()
/freebsd-12-stable/sys/dev/acpica/
Dacpi_hpet.c147 return (bus_read_4(sc->mem_res, HPET_MAIN_COUNTER)); in hpet_get_timecount()
188 val = bus_read_4(sc->mem_res, HPET_CONFIG); in hpet_enable()
202 val = bus_read_4(sc->mem_res, HPET_CONFIG); in hpet_disable()
230 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER); in hpet_start()
248 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER); in hpet_start()
295 t->next = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER) + in hpet_intr_single()
305 now = bus_read_4(sc->mem_res, HPET_MAIN_COUNTER); in hpet_intr_single()
325 val = bus_read_4(sc->mem_res, HPET_ISR); in hpet_intr()
506 val = bus_read_4(sc->mem_res, HPET_PERIOD); in hpet_attach()
515 sc->caps = bus_read_4(sc->mem_res, HPET_CAPABILITIES); in hpet_attach()
[all …]
/freebsd-12-stable/sys/powerpc/powerpc/
Dopenpic.c394 sc->sc_saved_config = bus_read_4(sc->sc_memr, OPENPIC_CONFIG); in openpic_suspend()
396 sc->sc_saved_ipis[i] = bus_read_4(sc->sc_memr, OPENPIC_IPI_VECTOR(i)); in openpic_suspend()
400 sc->sc_saved_prios[i] = bus_read_4(sc->sc_memr, OPENPIC_PCPU_TPR(i)); in openpic_suspend()
404 sc->sc_saved_timers[i].tcnt = bus_read_4(sc->sc_memr, OPENPIC_TCNT(i)); in openpic_suspend()
405 sc->sc_saved_timers[i].tbase = bus_read_4(sc->sc_memr, OPENPIC_TBASE(i)); in openpic_suspend()
406 sc->sc_saved_timers[i].tvec = bus_read_4(sc->sc_memr, OPENPIC_TVEC(i)); in openpic_suspend()
407 sc->sc_saved_timers[i].tdst = bus_read_4(sc->sc_memr, OPENPIC_TDST(i)); in openpic_suspend()
412 bus_read_4(sc->sc_memr, OPENPIC_SRC_VECTOR(i)) & ~OPENPIC_ACTIVITY; in openpic_suspend()
425 sc->sc_saved_config = bus_read_4(sc->sc_memr, OPENPIC_CONFIG); in openpic_resume()
/freebsd-12-stable/sys/mips/broadcom/
Dbcm_bmips.c246 sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); in bcm_bmips_mask_irq()
256 ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); in bcm_bmips_mask_irq()
278 sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); in bcm_bmips_unmask_irq()
288 ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); in bcm_bmips_unmask_irq()
310 sbstatus = bus_read_4(sc->cfg, SIBA_CFG0_FLAGST); in bcm_bmips_pic_intr()
315 sbintvec = bus_read_4(sc->cfg, SIBA_CFG0_INTVEC); in bcm_bmips_pic_intr()
319 ipsflag = bus_read_4(sc->cfg, SIBA_CFG0_IPSFLAG); in bcm_bmips_pic_intr()
Dbcm_mips74k.c269 oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq)); in bcm_mips74k_mask_irq()
288 oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(mips_irq)); in bcm_mips74k_unmask_irq()
308 intr = bus_read_4(sc->mem, BCM_MIPS74K_INTR_STATUS); in bcm_mips74k_pic_intr()
314 oobsel = bus_read_4(sc->mem, BCM_MIPS74K_INTR_SEL(cpuirq->mips_irq)); in bcm_mips74k_pic_intr()
/freebsd-12-stable/sys/dev/qlxgb/
Dqla_reg.h233 #define READ_REG32(ha, reg) bus_read_4((ha->pci_reg), reg)
239 bus_read_4((ha->pci_reg), reg);\
251 bus_read_4((ha->pci_reg), off);\
/freebsd-12-stable/sys/arm/amlogic/aml8726/
Daml8726_pinctrl.c84 #define MUX_READ_4(sc, reg) bus_read_4((sc)->res[0], reg)
87 #define PUD_READ_4(sc, reg) bus_read_4((sc)->res[1], reg)
90 #define PEN_READ_4(sc, reg) bus_read_4((sc)->res[2], reg)
93 #define AOMUX_READ_4(sc, reg) bus_read_4((sc)->res[3], reg)
96 #define AOPUD_READ_4(sc, reg) bus_read_4((sc)->res[4], reg)
99 #define AOPEN_READ_4(sc, reg) bus_read_4((sc)->res[5], reg)
Daml8726_identsoc.c105 aml8726_soc_hw_rev = bus_read_4(&res, AML_SOC_HW_REV_REG); in aml8726_identify_soc()
107 aml8726_soc_metal_rev = bus_read_4(&res, AML_SOC_METAL_REV_REG); in aml8726_identify_soc()
/freebsd-12-stable/sys/dev/sound/macio/
Ddavbus.c184 bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); in burgundy_init()
222 while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & in burgundy_write_locked()
351 bus_read_4(d->reg, DAVBUS_CODEC_STATUS))); in screamer_init()
385 while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & DAVBUS_CODEC_BUSY) in screamer_write_locked()
393 while (bus_read_4(d->reg, DAVBUS_CODEC_CTRL) & DAVBUS_CODEC_BUSY) in screamer_write_locked()
586 reg = bus_read_4(d->reg, DAVBUS_SOUND_CTRL); in davbus_cint()
589 status = bus_read_4(d->reg, DAVBUS_CODEC_STATUS); in davbus_cint()
/freebsd-12-stable/sys/dev/bhnd/cores/chipc/
Dchipc_slicer.c162 val = bus_read_4(res, ofs); in chipc_slicer_walk()
174 fs_ofs = bus_read_4(res, ofs + 24); in chipc_slicer_walk()
190 fw_len = bus_read_4(res, ofs + 4); in chipc_slicer_walk()
/freebsd-12-stable/sys/dev/mly/
Dmlyvar.h246 #define MLY_GET_REG4(sc, reg) bus_read_4 (sc->mly_regs_resource, reg)
257 *((u_int32_t *)ptr) = bus_read_4(sc->mly_regs_resource, mbox); \
258 *((u_int32_t *)ptr + 1) = bus_read_4(sc->mly_regs_resource, mbox + 4); \
259 *((u_int32_t *)ptr + 2) = bus_read_4(sc->mly_regs_resource, mbox + 8); \
260 *((u_int32_t *)ptr + 3) = bus_read_4(sc->mly_regs_resource, mbox + 12); \
/freebsd-12-stable/sys/arm/mv/armada38x/
Darmada38x_rtc.c325 return (bus_read_4(sc->res[RTC_RES], off)); in mv_rtc_reg_read()
348 val = bus_read_4(sc->res[RTC_SOC_RES], A38X_RTC_BRIDGE_TIMING_CTRL); in mv_rtc_configure_bus_a38x()
360 val = bus_read_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL0); in mv_rtc_configure_bus_a8k()
366 val = bus_read_4(sc->res[RTC_SOC_RES], A8K_RTC_BRIDGE_TIMING_CTRL0); in mv_rtc_configure_bus_a8k()
/freebsd-12-stable/sys/dev/terasic/mtl/
Dterasic_mtl_reg.c91 v = bus_read_4(sc->mtl_reg_res, offset); in terasic_mtl_reg_read()
148 *blendp = le32toh(bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND)); in terasic_mtl_reg_blend_get()
231 v = bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTCURSOR); in terasic_mtl_reg_textcursor_get()
262 addr = bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_TEXTFRAMEBUFADDR); in terasic_mtl_reg_textframebufaddr_get()
/freebsd-12-stable/sys/dev/ntb/ntb_hw/
Dntb_hw_plx.c121 bus_read_4((sc)->conf_res, PLX_NTX_OUR_BASE(sc) + (reg))
127 bus_read_4((sc)->conf_res, PLX_NTX_PEER_BASE(sc) + (reg))
133 bus_read_4((sc)->mw_info[(sc)->b2b_mw].mw_res, \
349 val = bus_read_4(sc->conf_res, 0x360); in ntb_plx_attach()
444 if (bus_read_4(sc->conf_res, sc->spad_off2) == 0x12345678) in ntb_plx_attach()
457 if (bus_read_4(sc->conf_res, sc->spad_off2) == 0x12345678) in ntb_plx_attach()
566 val = bus_read_4(sc->conf_res, reg); in ntb_plx_link_enable()
588 val = bus_read_4(sc->conf_res, reg); in ntb_plx_link_disable()
605 val = bus_read_4(sc->conf_res, reg); in ntb_plx_link_enabled()
918 *val = bus_read_4(sc->conf_res, off); in ntb_plx_spad_read()
[all …]
/freebsd-12-stable/sys/arm/broadcom/bcm2835/
Dbcm2835_dma.c186 cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch)); in bcm_dma_reset()
194 cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch)); in bcm_dma_reset()
243 reg = bus_read_4(sc->sc_mem, BCM_DMA_ENABLE); in bcm_dma_init()
246 reg = bus_read_4(sc->sc_mem, BCM_DMA_INT_STATUS); in bcm_dma_init()
539 reg = bus_read_4(sc->sc_mem, BCM_DMA_CH(ch) + i*4); in bcm_dma_reg_dump()
619 cs = bus_read_4(sc->sc_mem, BCM_DMA_CS(ch->ch)); in bcm_dma_intr()
635 debug = bus_read_4(sc->sc_mem, BCM_DMA_DEBUG(ch->ch)); in bcm_dma_intr()
/freebsd-12-stable/sys/dev/twe/
Dtwe_compat.h77 #define TWE_STATUS(sc) (u_int32_t)bus_read_4((sc)->twe_io, 0x4)
79 #define TWE_RESPONSE_QUEUE(sc) (TWE_Response_Queue)bus_read_4((sc)->twe_io, 0xc)

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