Searched refs:aux_clock_divider (Results 1 – 1 of 1) sorted by relevance
347 uint32_t aux_clock_divider; in intel_dp_aux_ch() local383 aux_clock_divider = intel_ddi_get_cdclk_freq(dev_priv) >> 1; in intel_dp_aux_ch()385 aux_clock_divider = 100; in intel_dp_aux_ch()387 aux_clock_divider = 200; /* SNB & IVB eDP input clock at 400Mhz */ in intel_dp_aux_ch()389 aux_clock_divider = 225; /* eDP input clock at 450Mhz */ in intel_dp_aux_ch()391 aux_clock_divider = DIV_ROUND_UP(intel_pch_rawclk(dev), 2); in intel_dp_aux_ch()393 aux_clock_divider = intel_hrawclk(dev) / 2; in intel_dp_aux_ch()427 (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) | in intel_dp_aux_ch()