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Searched refs:_INDX_ADDR (Results 1 – 4 of 4) sorted by relevance

/freebsd-12-stable/sys/dev/rp/
Drpreg.h157 #define _INDX_ADDR 0x3C /* Index Register Address 16 Write */ macro
438 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
450 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
462 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
486 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
500 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
512 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R + 0x30)); \
539 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
551 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R + 0x04)); \
563 rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
[all …]
Drp.c165 rp_writeaiop4(CtlP, aiop, _INDX_ADDR,0x12340000L); /* write to chan 0 SRAM */ in sReadAiopNumChan()
166 rp_writeaiop2(CtlP, aiop, _INDX_ADDR,0); /* read from SRAM, chan 0 */ in sReadAiopNumChan()
168 rp_writeaiop2(CtlP, aiop, _INDX_ADDR,0x4000); /* read from SRAM, chan 4 */ in sReadAiopNumChan()
216 rp_writech4(ChP,_INDX_ADDR,le32dec(R)); in sInitChan()
235 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->BaudDiv)); in sInitChan()
241 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxControl)); in sInitChan()
247 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->RxControl)); in sInitChan()
253 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxEnables)); in sInitChan()
259 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxCompare)); in sInitChan()
265 rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxReplace1)); in sInitChan()
[all …]
Drp_pci.c307 rp_writeaiop2(CtlP, i, _INDX_ADDR,_CLK_PRE); /* clock prescaler */ in sPCIInitController()
Drp_isa.c450 rp_writeaiop2(CtlP,i,_INDX_ADDR,_CLK_PRE); /* clock prescaler */ in sInitController()