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Searched refs:XVT (Results 1 – 7 of 7) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h747 bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
750 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
761 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.h1039 shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
1042 if (XVT.isVector()) in shouldTransformSignedTruncationCheck()
1053 return VTIsOk(XVT) && VTIsOk(KeptBitsVT); in shouldTransformSignedTruncationCheck()
DX86ISelDAGToDAG.cpp3582 MVT XVT = X.getSimpleValueType(); in matchBitExtract() local
3618 if (XVT != MVT::i32) { in matchBitExtract()
3619 Control = CurDAG->getNode(ISD::ANY_EXTEND, DL, XVT, Control); in matchBitExtract()
3624 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract()
3627 if (XVT != NVT) { in matchBitExtract()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp3253 EVT XVT = X.getValueType(); in optimizeSetCCOfSignedTruncationCheck() local
3288 assert(XVT.isInteger()); in optimizeSetCCOfSignedTruncationCheck()
3289 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
3302 assert(KeptBits > 0 && KeptBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
3307 XVT, KeptBits)) in optimizeSetCCOfSignedTruncationCheck()
3310 const unsigned MaskedBits = XVT.getSizeInBits() - KeptBits; in optimizeSetCCOfSignedTruncationCheck()
3311 assert(MaskedBits > 0 && MaskedBits < XVT.getSizeInBits() && "unreachable"); in optimizeSetCCOfSignedTruncationCheck()
3315 SDValue ShiftAmt = DAG.getConstant(MaskedBits, DL, XVT); in optimizeSetCCOfSignedTruncationCheck()
3316 SDValue T0 = DAG.getNode(ISD::SHL, DL, XVT, X, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
3317 SDValue T1 = DAG.getNode(ISD::SRA, DL, XVT, T0, ShiftAmt); in optimizeSetCCOfSignedTruncationCheck()
DDAGCombiner.cpp4831 EVT XVT = X.getValueType(); in hoistLogicOpWithSameOpcodeHands() local
4840 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4845 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4850 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4853 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4864 if (XVT != Y.getValueType()) in hoistLogicOpWithSameOpcodeHands()
4867 if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4871 if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT)) in hoistLogicOpWithSameOpcodeHands()
4873 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands()
4875 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DTargetLowering.h730 virtual bool shouldTransformSignedTruncationCheck(EVT XVT, in shouldTransformSignedTruncationCheck() argument
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp3186 EVT XVT = X.getValueType(); in performShlCombine() local
3187 SDValue Shl = DAG.getNode(ISD::SHL, SL, XVT, X, SDValue(RHS, 0)); in performShlCombine()