Searched refs:ValOp (Results 1 – 5 of 5) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 2698 const MachineOperand &ValOp = MI.getOperand(TakeOp); in evaluateHexCondMove() local
2702 if (ValOp.isImm()) { in evaluateHexCondMove()
2703 int64_t V = ValOp.getImm(); in evaluateHexCondMove()
2711 if (ValOp.isReg()) { in evaluateHexCondMove()
2712 RegisterSubReg R(ValOp); in evaluateHexCondMove()
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| D | HexagonSplitDouble.cpp | 639 MachineOperand &ValOp = Load ? MI->getOperand(0) in splitMemRef() local
642 UUPairMap::const_iterator F = PairMap.find(ValOp.getReg()); in splitMemRef()
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| D | HexagonBitSimplify.cpp | 1929 MachineOperand &ValOp = MI->getOperand(2); in genStoreUpperHalf() local
1930 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf()
1940 ValOp.setReg(H.Reg); in genStoreUpperHalf()
1941 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| D | SROA.cpp | 796 Value *ValOp = SI.getValueOperand(); in visitStoreInst() local
797 if (ValOp == *U) in visitStoreInst()
806 if (isa<ScalableVectorType>(ValOp->getType())) in visitStoreInst()
809 uint64_t Size = DL.getTypeStoreSize(ValOp->getType()).getFixedSize(); in visitStoreInst()
827 assert((!SI.isSimple() || ValOp->getType()->isSingleValueType()) && in visitStoreInst()
829 handleLoadOrStore(ValOp->getType(), SI, Offset, Size, SI.isVolatile()); in visitStoreInst()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 5459 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorStores() local
5464 EVT ValVT = ValOp.getValueType(); in GenWidenVectorStores()
5487 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, in GenWidenVectorStores()
5503 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); in GenWidenVectorStores()
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