Searched refs:VSEXT_VL (Results 1 – 3 of 3) sorted by relevance
256 VSEXT_VL, enumerator
2257 return lowerFixedLengthVectorExtendToRVV(Op, DAG, RISCVISD::VSEXT_VL); in LowerOperation()6324 bool IsSignExt = Op0.getOpcode() == RISCVISD::VSEXT_VL; in PerformDAGCombine()6350 unsigned ExtOpc = IsSignExt ? RISCVISD::VSEXT_VL : RISCVISD::VZEXT_VL; in PerformDAGCombine()8443 NODE_NAME_CASE(VSEXT_VL) in getTargetNodeName()
214 def riscv_sext_vl : SDNode<"RISCVISD::VSEXT_VL", SDT_RISCVVEXTEND_VL>;