Searched refs:VMLAVs (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 244 VMLAVs, // sign- or zero-extend the elements of two vectors to i32, multiply enumerator
|
| D | ARMISelLowering.cpp | 1745 MAKE_CASE(ARMISD::VMLAVs) in getTargetNodeName()
16160 return DAG.getNode(ARMISD::VMLAVs, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
16171 DAG.getNode(ARMISD::VMLAVs, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
|
| D | ARMInstrMVE.td | 1152 def ARMVMLAVs : SDNode<"ARMISD::VMLAVs", SDTVecReduce2>;
|