Searched refs:TrgReg (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 143 void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 261 unsigned TrgReg, bool Is64Bit, in emitAddu() argument
263 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(), in emitAddu()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3904 unsigned TrgReg; in expandCondBranches() local
3906 TrgReg = TrgOp.getReg(); in expandCondBranches()
3911 TrgReg = getATReg(IDLoc); in expandCondBranches()
3912 if (!TrgReg) in expandCondBranches()
3968 if (loadImmediate(TrgOp.getImm(), TrgReg, Mips::NoRegister, !isGP64bit(), in expandCondBranches()
4026 bool IsTrgRegZero = (TrgReg == Mips::ZERO); in expandCondBranches()
4106 IsSrcRegZero ? TrgReg : SrcReg, Mips::ZERO, in expandCondBranches()
4114 IsSrcRegZero ? TrgReg : SrcReg, in expandCondBranches()
4144 ReverseOrderSLT ? TrgReg : SrcReg, in expandCondBranches()
4145 ReverseOrderSLT ? SrcReg : TrgReg, IDLoc, STI); in expandCondBranches()
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