| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | MIMGInstructions.td | 267 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
292 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
305 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
393 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
419 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
433 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe),
511 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da);
559 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe);
575 R128A16:$r128, GFX10A16:$a16, TFE:$tfe, LWE:$lwe));
664 R128A16:$r128, TFE:$tfe, LWE:$lwe, DA:$da),
[all …]
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| D | SIInstrInfo.td | 1124 def TFE : NamedOperandBit<"TFE", NamedMatchClass<"TFE">>;
1125 def TFE_0 : NamedOperandBit_0<"TFE", NamedMatchClass<"TFE">>;
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| D | AMDGPUInstructionSelector.cpp | 1492 static bool parseTexFail(uint64_t TexFailCtrl, bool &TFE, bool &LWE, in parseTexFail() argument
1497 TFE = (TexFailCtrl & 0x1) ? 1 : 0; in parseTexFail()
1534 bool TFE; in selectImageIntrinsic() local
1538 TFE, LWE, IsTexFail)) in selectImageIntrinsic()
1729 MIB.addImm(TFE); // tfe in selectImageIntrinsic()
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| D | BUFInstructions.td | 154 offset:$offset, FORMAT:$format, CPol:$cpol, TFE:$tfe, SWZ:$swz),
156 offset:$offset, FORMAT:$format, CPol:$cpol, TFE:$tfe, SWZ:$swz)
161 TFE:$tfe, SWZ:$swz),
164 TFE:$tfe, SWZ:$swz)
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| D | SIISelLowering.cpp | 5965 static bool parseTexFail(SDValue TexFailCtrl, SelectionDAG &DAG, SDValue *TFE, in parseTexFail() argument
5975 *TFE = DAG.getTargetConstant((Value & 0x1) ? 1 : 0, DL, MVT::i32); in parseTexFail()
6233 SDValue TFE; in lowerImage() local
6237 if (!parseTexFail(TexFail, DAG, &TFE, &LWE, IsTexFail)) in lowerImage()
6304 Ops.push_back(TFE); //tfe in lowerImage()
6305 } else if (cast<ConstantSDNode>(TFE)->getZExtValue()) { in lowerImage()
11234 MachineOperand *TFE = TII->getNamedOperand(MI, AMDGPU::OpName::tfe); in AddIMGInit() local
11238 if (!TFE && !LWE) // intersect_ray in AddIMGInit()
11241 unsigned TFEVal = TFE ? TFE->getImm() : 0; in AddIMGInit()
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| D | SIInstrInfo.cpp | 3989 const MachineOperand *TFE = getNamedOperand(MI, AMDGPU::OpName::tfe); in verifyInstruction() local
3998 if ((LWE && LWE->getImm()) || (TFE && TFE->getImm())) in verifyInstruction()
5716 if (const MachineOperand *TFE = in legalizeOperands() local
5718 MIB.addImm(TFE->getImm()); in legalizeOperands()
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| D | FLATInstructions.td | 138 let Inst{55} = acc; // nv on GFX9+, TFE before. AccVGPR for data on GFX90A.
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| /freebsd-12-stable/sys/dev/axgbe/ |
| D | xgbe-dev.c | 393 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); in xgbe_disable_tx_flow_control()
421 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1); in xgbe_enable_tx_flow_control()
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