Searched refs:Sel1 (Results 1 – 7 of 7) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonLoopIdiomRecognition.cpp | 1684 if (SelectInst *Sel1 = dyn_cast<SelectInst>(Sel->getFalseValue())) { in setupPreSimplifier() local
1685 if (Sel1->getCondition() == C) in setupPreSimplifier()
1686 return B.CreateSelect(C, Sel->getTrueValue(), Sel1->getFalseValue()); in setupPreSimplifier()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSelect.cpp | 1235 Value *Sel1 = Sel0.getFalseValue(); in canonicalizeClampLike() local
1265 std::swap(X, Sel1); in canonicalizeClampLike()
1277 if (!Sel1->hasOneUse()) in canonicalizeClampLike()
1294 if (!match(Sel1, m_Select(m_Value(Cmp1), m_Value(ReplacementLow), in canonicalizeClampLike()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 2410 bool Sel1 = SelectVOP3PMadMixModsImpl(Src1, Src1, Src1Mods); in SelectFMAD_FMA() local
2418 if (Sel0 || Sel1 || Sel2) { in SelectFMAD_FMA()
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| D | AMDGPULegalizerInfo.cpp | 3060 auto Sel1 = B.buildSelect( in legalizeUnsignedDIV_REM64Impl() local
3063 Sel1, MulHi3); in legalizeUnsignedDIV_REM64Impl()
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| D | AMDGPUISelLowering.cpp | 1982 SDValue Sel1 = DAG.getSelectCC(DL, C6, Zero, Add4, Add3, ISD::SETNE); in LowerUDIVREM64() local
1983 SDValue Div = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE); in LowerUDIVREM64()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7883 SDValue Sel1; in LowerSELECT_CC() local
7893 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV); in LowerSELECT_CC()
7894 if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits in LowerSELECT_CC()
7895 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); in LowerSELECT_CC()
7897 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), Sel1, FV); in LowerSELECT_CC()
7929 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, Cmp, TV, FV); in LowerSELECT_CC()
7930 if (Sel1.getValueType() == MVT::f32) // Comparison is always 64-bits in LowerSELECT_CC()
7931 Sel1 = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, Sel1); in LowerSELECT_CC()
7933 DAG.getNode(ISD::FNEG, dl, MVT::f64, Cmp), Sel1, FV); in LowerSELECT_CC()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/ |
| D | AutoUpgrade.cpp | 2385 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); in UpgradeIntrinsicCall() local
2386 Rep = Builder.CreateOr(Sel0, Sel1); in UpgradeIntrinsicCall()
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