| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 463 STRICT_FSETCCS, enumerator
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| D | SelectionDAG.h | 1068 return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 1037 case ISD::STRICT_FSETCCS: in LegalizeOp()
1042 Node->getOpcode() == ISD::STRICT_FSETCCS ? 3 : in LegalizeOp()
1046 Node->getOpcode() == ISD::STRICT_FSETCCS ? 1 : 0; in LegalizeOp()
3560 case ISD::STRICT_FSETCCS: { in ExpandNode()
3562 bool IsSignaling = Node->getOpcode() == ISD::STRICT_FSETCCS; in ExpandNode()
4374 Node->getOpcode() == ISD::STRICT_FSETCCS) in PromoteNode()
4620 case ISD::STRICT_FSETCCS: { in PromoteNode()
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| D | LegalizeVectorOps.cpp | 1469 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
1503 Node->getOpcode() == ISD::STRICT_FSETCCS) in UnrollStrictFPOp()
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| D | SelectionDAGDumper.cpp | 282 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 843 case ISD::STRICT_FSETCCS: in SoftenFloatOperand()
1020 Chain, N->getOpcode() == ISD::STRICT_FSETCCS); in SoftenFloatOp_SETCC()
1786 case ISD::STRICT_FSETCCS: in ExpandFloatOperand()
1957 N->getOpcode() == ISD::STRICT_FSETCCS); in ExpandFloatOp_SETCC()
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| D | LegalizeVectorTypes.cpp | 3353 case ISD::STRICT_FSETCCS: in WidenVecRes_StrictFP()
4129 case ISD::STRICT_FSETCCS: in isSETCCOp()
4547 case ISD::STRICT_FSETCCS: Res = WidenVecOp_STRICT_FSETCC(N); break; in WidenVectorOperand()
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| D | SelectionDAGISel.cpp | 1180 case ISD::STRICT_FSETCCS: in DoInstructionSelection()
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| D | SelectionDAG.cpp | 3087 case ISD::STRICT_FSETCCS: { in computeKnownBits()
3910 case ISD::STRICT_FSETCCS: { in ComputeNumSignBits()
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| D | LegalizeIntegerTypes.cpp | 81 case ISD::STRICT_FSETCCS: in PromoteIntegerResult()
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| D | DAGCombiner.cpp | 905 N.getOpcode() == ISD::STRICT_FSETCCS)) { in isSetCCEquivalent()
7815 case ISD::STRICT_FSETCCS: { in visitXOR()
7821 N0.getOperand(0), N0Opcode == ISD::STRICT_FSETCCS); in visitXOR()
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| D | SelectionDAGBuilder.cpp | 7300 case ISD::STRICT_FSETCCS: { in visitConstrainedFPIntrinsic()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 515 Opcode = ISD::STRICT_FSETCCS; in mightUseCTR()
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| D | PPCISelLowering.cpp | 475 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal); in PPCTargetLowering()
476 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal); in PPCTargetLowering()
477 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Legal); in PPCTargetLowering()
496 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Legal); in PPCTargetLowering()
497 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Legal); in PPCTargetLowering()
1235 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in PPCTargetLowering()
3464 Op->getOpcode() == ISD::STRICT_FSETCCS); in LowerSETCC()
10832 case ISD::STRICT_FSETCCS: in LowerOperation()
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| D | PPCISelDAGToDAG.cpp | 5038 case ISD::STRICT_FSETCCS: in Select()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 143 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
400 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in SystemZTargetLowering()
5432 case ISD::STRICT_FSETCCS: in LowerOperation()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 582 def strict_fsetccs : SDNode<"ISD::STRICT_FSETCCS", SDTSetCC, [SDNPHasChain]>;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 383 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in AArch64TargetLowering()
384 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in AArch64TargetLowering()
385 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in AArch64TargetLowering()
442 setOperationAction(ISD::STRICT_FSETCCS, MVT::f128, Custom); in AArch64TargetLowering()
4742 case ISD::STRICT_FSETCCS: in LowerOperation()
7201 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1428 setOperationAction(ISD::STRICT_FSETCCS, MVT::f16, Custom); in ARMTargetLowering()
1430 setOperationAction(ISD::STRICT_FSETCCS, MVT::f32, Custom); in ARMTargetLowering()
1432 setOperationAction(ISD::STRICT_FSETCCS, MVT::f64, Custom); in ARMTargetLowering()
10082 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerFSETCC()
10230 case ISD::STRICT_FSETCCS: return LowerFSETCC(Op, DAG); in LowerOperation()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 454 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
978 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
1317 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
1497 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
1677 setOperationAction(ISD::STRICT_FSETCCS, VT, Custom); in X86TargetLowering()
23032 Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC()
23047 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerVSETCC()
23590 Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
23607 Op.getOpcode() == ISD::STRICT_FSETCCS); in LowerSETCC()
23660 bool IsSignaling = Op.getOpcode() == ISD::STRICT_FSETCCS; in LowerSETCC()
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