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Searched refs:SSE3 (Results 1 – 15 of 15) sorted by relevance

/freebsd-12-stable/contrib/gcc/config/i386/
Di386.opt197 Target Report Mask(SSE3)
198 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
202 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
206 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
/freebsd-12-stable/contrib/llvm-project/clang/lib/Basic/Targets/
DX86.cpp339 .Case("+sse3", SSE3) in handleTargetFeatures()
777 case SSE3: in getTargetDefines()
800 case SSE3: in getTargetDefines()
1007 .Case("sse3", SSELevel >= SSE3) in hasFeature()
DX86.h56 SSE3, enumerator
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/
DX86Subtarget.h62 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
632 bool hasSSE3() const { return X86SSELevel >= SSE3; } in hasSSE3()
DX86.td71 def FeatureSSE3 : SubtargetFeature<"sse3", "X86SSELevel", "SSE3",
72 "Enable SSE3 instructions",
505 // SSE3) with better latency/throughput than the alternative sequence.
1176 // Enable the PostRAScheduler for SSE2 and SSE3 class cpus.
DX86InstrFormats.td671 // SSE3 Instruction Templates:
673 // S3I - SSE3 instructions with PD prefixes.
674 // S3SI - SSE3 instructions with XS prefix.
675 // S3DI - SSE3 instructions with XD prefix.
DX86InstrFPStack.td584 // FISTTP requires SSE3 even though it's a FPStack op.
DX86InstrSSE.td4345 // SSE3 - Replicate Single FP - MOVSHDUP and MOVSLDUP
4411 // SSE3 - Replicate Double FP - MOVDDUP
4461 // SSE3 - Move Unaligned Integer
4481 // SSE3 - Arithmetic
4533 // SSE3 Instructions
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Support/
DX86TargetParser.def109 X86_FEATURE_COMPAT(SSE3, "sse3")
/freebsd-12-stable/crypto/openssl/doc/man3/
DOPENSSL_ia32cap.pod45 =item bit #41 denoting SSSE3, Supplemental SSE3, support;
/freebsd-12-stable/sys/contrib/libsodium/
Dconfigure.ac395 AC_MSG_CHECKING(for SSE3 instructions set)
/freebsd-12-stable/contrib/gcc/
DChangeLog.gcc43145 with SSE3 instruction set support.
/freebsd-12-stable/contrib/gcclibs/libgomp/
DChangeLog336 lp64 x86 targets. Do not check for SSE3 bit. Do not define bit_SSE3.
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/
DIntrinsicsX86.td501 // SSE3
/freebsd-12-stable/contrib/gcc/doc/
Dinvoke.texi9242 Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction
9246 SSE2 and SSE3 instruction set support.
9248 Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
9264 Improved versions of k8, opteron and athlon64 with SSE3 instruction set support.
9267 supersets MMX, SSE, SSE2, SSE3, SSE4A, 3dNOW!, enhanced 3dNOW!, ABM and 64-bit
9580 SSE, SSE2, SSE3, SSSE3, SSE4A, ABM, AES or 3DNow! extended