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Searched refs:SPLAT_VECTOR_SPLIT_I64_VL (Results 1 – 3 of 3) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
DRISCVISelLowering.h134 SPLAT_VECTOR_SPLIT_I64_VL, enumerator
DRISCVISelDAGToDAG.cpp53 if (N->getOpcode() != RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL) in PreprocessISelDAG()
DRISCVISelLowering.cpp1776 return DAG.getNode(RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL, DL, VT, Lo, Hi, VL); in splatPartsI64WithVL()
3202 return DAG.getNode(RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL, DL, VecVT, Lo, Hi, in lowerSPLAT_VECTOR_PARTS()
6292 if (ShAmt.getOpcode() == RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL) { in PerformDAGCombine()
6308 if (ShAmt.getOpcode() == RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL) { in PerformDAGCombine()
8370 NODE_NAME_CASE(SPLAT_VECTOR_SPLIT_I64_VL) in getTargetNodeName()