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Searched refs:SOR_PLL0_PWR (Results 1 – 2 of 2) sorted by relevance

/freebsd-12-stable/sys/arm/nvidia/drm2/
Dtegra_hdmi_reg.h165 #define SOR_PLL0_PWR (1 << 0) macro
Dtegra_hdmi.c673 val &= ~SOR_PLL0_PWR; in hdmi_sor_start()
802 val &= ~SOR_PLL0_PWR; in hdmi_enable()