| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 143 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in BPFTargetLowering()
145 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in BPFTargetLowering()
146 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in BPFTargetLowering()
147 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in BPFTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 697 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
729 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
766 case ISD::SEXTLOAD: OS << ", sext"; break; in print_details()
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| D | DAGCombiner.cpp | 10003 auto LoadExtOpcode = IsSigned ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in visitVSELECT()
10335 if ((LoadExt == ISD::SEXTLOAD && ExtOpcode != ISD::SIGN_EXTEND) || in isCompatibleLoad()
10370 ExtLoadOpcode = ISD::SEXTLOAD; in tryToFoldExtendSelectLoad()
10602 N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in CombineExtLoad()
10688 Load->getExtensionType() == ISD::SEXTLOAD || Load->isIndexed()) in CombineZExtLogicopShiftLoad()
10787 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node) in tryToFoldExtOfExtload()
10961 unsigned LoadOpcode = IsSignedCmp ? ISD::SEXTLOAD : ISD::ZEXTLOAD; in foldSextSetcc()
11105 ISD::SEXTLOAD, ISD::SIGN_EXTEND)) in visitSIGN_EXTEND()
11109 tryToFoldExtOfMaskedLoad(DAG, TLI, VT, N, N0, ISD::SEXTLOAD, in visitSIGN_EXTEND()
11120 DAG, *this, TLI, VT, LegalOperations, N, N0, ISD::SEXTLOAD)) in visitSIGN_EXTEND()
[all …]
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| D | LegalizeDAG.cpp | 759 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
932 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
3516 ISD::SEXTLOAD, dl, PTy, Chain, Addr, in ExpandNode()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 51 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in R600TargetLowering()
52 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom); in R600TargetLowering()
53 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom); in R600TargetLowering()
66 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, MVT::v2i1, Expand); in R600TargetLowering()
70 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i1, Expand); in R600TargetLowering()
1336 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1414 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
1535 Ext = ISD::SEXTLOAD; in LowerFormalArguments()
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| D | AMDGPUISelLowering.cpp | 136 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); in AMDGPUTargetLowering()
144 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in AMDGPUTargetLowering()
145 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Legal); in AMDGPUTargetLowering()
146 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Legal); in AMDGPUTargetLowering()
147 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in AMDGPUTargetLowering()
162 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); in AMDGPUTargetLowering()
165 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); in AMDGPUTargetLowering()
168 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); in AMDGPUTargetLowering()
171 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v3i16, Expand); in AMDGPUTargetLowering()
174 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Expand); in AMDGPUTargetLowering()
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| D | AMDGPUISelDAGToDAG.cpp | 498 LoadOp = LdHi->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
526 LoadOp = LdLo->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1335 enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD }; enumerator
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| D | SelectionDAGNodes.h | 2699 cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
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| D | BasicTTIImpl.h | 932 ((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 66 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MSP430TargetLowering()
68 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in MSP430TargetLowering()
69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 138 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
292 IntExt = ISD::SEXTLOAD; in tryLoadOfLoadIntrinsic()
1475 if (L->getExtensionType() != ISD::SEXTLOAD) in DetectUseSxtw()
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| D | HexagonISelLowering.cpp | 1605 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); in HexagonTargetLowering()
1666 setLoadExtAction(ISD::SEXTLOAD, TargetVT, VT, Expand); in HexagonTargetLowering()
1685 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, MVT::v2i8, Legal); in HexagonTargetLowering()
1688 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, MVT::v4i8, Legal); in HexagonTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 287 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
295 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD}) in WebAssemblyTargetLowering()
301 for (auto Ext : {ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD}) { in WebAssemblyTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelDAGToDAG.cpp | 899 if (PlainLoad && (PlainLoad->getExtensionType() == ISD::SEXTLOAD)) in tryLoad()
1038 if (ExtensionType == ISD::SEXTLOAD) in tryLoadVector()
1681 bool IsSigned = LdNode->getExtensionType() == ISD::SEXTLOAD; in tryLDGLDU()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 126 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in XCoreTargetLowering()
128 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); in XCoreTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1611 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) in tryARMIndexedLoad()
1615 if (LD->getExtensionType() == ISD::SEXTLOAD) { in tryARMIndexedLoad()
1697 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryT2IndexedLoad()
1762 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
1778 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1442 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Expand); in SparcTargetLowering()
1446 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i32, VT, Expand); in SparcTargetLowering()
1477 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SparcTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 299 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in SystemZTargetLowering()
333 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in SystemZTargetLowering()
2146 if (Load->getExtensionType() == ISD::SEXTLOAD) { in adjustSubwordCmp()
2179 ISD::SEXTLOAD : in adjustSubwordCmp()
2209 case ISD::SEXTLOAD: in isNaturalMemoryOperand()
2362 (Type == ISD::SEXTLOAD && C.ICmpType != SystemZICMP::UnsignedOnly)) { in adjustICmpTruncate()
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| D | SystemZOperators.td | 531 return Type == ISD::EXTLOAD || Type == ISD::SEXTLOAD;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 138 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in LanaiTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2987 if (InputLoad && InputLoad->getExtensionType() == ISD::SEXTLOAD) in signExtendInputIfNeeded()
3026 if (InputLoad && InputLoad->getExtensionType() != ISD::SEXTLOAD) in zeroExtendInputIfNeeded()
5147 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
5184 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1323 else if (ExtType == ISD::SEXTLOAD) in tryIndexedLoad()
1333 if (ExtType == ISD::SEXTLOAD) { in tryIndexedLoad()
1346 if (ExtType == ISD::SEXTLOAD) { in tryIndexedLoad()
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| D | AArch64ISelLowering.cpp | 836 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Expand); in AArch64TargetLowering()
1108 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
1143 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, MVT::v4i8, Custom); in AArch64TargetLowering()
1146 setLoadExtAction(ISD::SEXTLOAD, MVT::v4i32, MVT::v4i8, Custom); in AArch64TargetLowering()
1246 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); in AArch64TargetLowering()
4343 bool ResNeedsSignExtend = ExtTy == ISD::EXTLOAD || ExtTy == ISD::SEXTLOAD; in LowerMGATHER()
4685 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) in LowerLOAD()
5238 ExtType = ISD::SEXTLOAD; in LowerFormalArguments()
15430 ExtType = ISD::SEXTLOAD; in checkValueWidth()
15528 if (ExtType == ISD::SEXTLOAD) in isEquivalentMaskless()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 315 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); in MipsTargetLowering()
489 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, MVT::i32, Custom); in MipsTargetLowering()
2708 if ((VT == MVT::i32) || (ExtType == ISD::SEXTLOAD) || in lowerLOAD()
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