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/freebsd-12-stable/cddl/contrib/opensolaris/lib/libdtrace/common/
Ddt_lex.l104 %s S0 S1 S2 S3 S4
139 <S0>auto return (DT_KEY_AUTO);
140 <S0>break return (DT_KEY_BREAK);
141 <S0>case return (DT_KEY_CASE);
142 <S0>char return (DT_KEY_CHAR);
143 <S0>const return (DT_KEY_CONST);
144 <S0>continue return (DT_KEY_CONTINUE);
145 <S0>counter return (DT_KEY_COUNTER);
146 <S0>default return (DT_KEY_DEFAULT);
147 <S0>do return (DT_KEY_DO);
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/ADT/
DStringSwitch.h88 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, T Value) { in Cases() argument
89 return Case(S0, Value).Case(S1, Value); in Cases()
92 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
94 return Case(S0, Value).Cases(S1, S2, Value); in Cases()
97 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
99 return Case(S0, Value).Cases(S1, S2, S3, Value); in Cases()
102 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
104 return Case(S0, Value).Cases(S1, S2, S3, S4, Value); in Cases()
107 StringSwitch &Cases(StringLiteral S0, StringLiteral S1, StringLiteral S2, in Cases() argument
110 return Case(S0, Value).Cases(S1, S2, S3, S4, S5, Value); in Cases()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
DMergedLoadStoreMotion.cpp119 PHINode *getPHIOperand(BasicBlock *BB, StoreInst *S0, StoreInst *S1);
122 bool canSinkStoresAndGEPs(StoreInst *S0, StoreInst *S1) const;
210 PHINode *MergedLoadStoreMotion::getPHIOperand(BasicBlock *BB, StoreInst *S0, in getPHIOperand() argument
213 Value *Opd1 = S0->getValueOperand(); in getPHIOperand()
220 NewPN->applyMergedLocation(S0->getDebugLoc(), S1->getDebugLoc()); in getPHIOperand()
221 NewPN->addIncoming(Opd1, S0->getParent()); in getPHIOperand()
229 bool MergedLoadStoreMotion::canSinkStoresAndGEPs(StoreInst *S0, in canSinkStoresAndGEPs() argument
231 auto *A0 = dyn_cast<Instruction>(S0->getPointerOperand()); in canSinkStoresAndGEPs()
234 (A0->getParent() == S0->getParent()) && A1->hasOneUse() && in canSinkStoresAndGEPs()
243 void MergedLoadStoreMotion::sinkStoresAndGEPs(BasicBlock *BB, StoreInst *S0, in sinkStoresAndGEPs() argument
[all …]
/freebsd-12-stable/crypto/openssl/crypto/sha/asm/
Dsha256-c64xplus.pl35 ($A,$Actx,$B,$Bctx,$C,$Cctx,$D,$Dctx,$T2,$S0,$s1,$t0a,$t1a,$t2a,$X9,$X14)
125 || ROTL $A,30,$S0
141 || XOR $t0a,$S0,$S0
143 XOR $t1a,$S0,$S0 ; Sigma0(a)
148 || ADD $S0,$Maj,$T2 ; T2 = Sigma0(a) + Maj(a,b,c)
162 ROTL $A,30,$S0 ; BODY_15
180 || XOR $t0a,$S0,$S0
182 XOR $t1a,$S0,$S0 ; Sigma0(a)
187 || ADD $S0,$Maj,$T2 ; T2 = Sigma0(a) + Maj(a,b,c)
216 ROTL $A,30,$S0
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
DHexagonScheduleV60.td32 // S0-3 | | | CVI_VA | | CVI_VA | | CVI_VA | | CVI_VA | | |
34 // S0-3 | | | | | | | | | CVI_VP | | |
35 // S0-3 | | | | | | | CVI_VS | | | | |
36 // S0-1 |(CVI_LD) | | CVI_LD | | CVI_LD | | CVI_LD | | CVI_LD | | |
37 // S0-1 |(C*TMP_LD) | | | | | | | | | |
39 // S0 | | | CVI_ST | | CVI_ST | | CVI_ST | | CVI_ST | |(CVI_ST) |
40 // S0 | | | | | | | | | | |(C*TMP_ST)
46 // S0-3 | CVI_VA_DV | | CVI_VA_DV |
47 // S0-3 | | | CVI_VP_DV |
51 // S0-3 | CVI_HIST Histogram |
DHexagonSubtarget.cpp342 SUnit &S0 = DAG->SUnits[i]; in apply() local
343 MachineInstr &L0 = *S0.getInstr(); in apply()
372 SDep A(&S0, SDep::Artificial); in apply()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
DMips16FrameLowering.cpp87 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) in emitPrologue()
105 .addReg(Mips::S0); in emitEpilogue()
171 SavedRegs.set(Mips::S0); in determineCalleeSaves()
DMipsRegisterInfo.td103 def S0 : MipsGPRReg< 16, "16">, DwarfRegNum<[16]>;
137 def S0_64 : Mips64GPRReg< 16, "16", [S0]>, DwarfRegNum<[16]>;
290 S0, S1, S2, S3, S4, S5, S6, S7,
310 S0, S1, S2, S3, S4, S5, S6, S7,
320 S0, S1,
340 S0, S2, S3, S4)>;
370 S0, S1)>;
376 S0, S1,
DMipsRegisterInfo.cpp193 Reserved.set(Mips::S0); in getReservedRegs()
282 return TFI->hasFP(MF) ? Mips::S0 : Mips::SP; in getFrameRegister()
DMips16RegisterInfo.cpp104 FrameReg = Mips::S0; in eliminateFI()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
DLoadStoreVectorizer.cpp1024 StoreInst *S0 = cast<StoreInst>(Chain[0]); in vectorizeStoreChain() local
1042 unsigned AS = S0->getPointerAddressSpace(); in vectorizeStoreChain()
1046 Align Alignment = S0->getAlign(); in vectorizeStoreChain()
1105 if (S0->getPointerAddressSpace() != DL.getAllocaAddrSpace()) { in vectorizeStoreChain()
1111 Align NewAlign = getOrEnforceKnownAlignment(S0->getPointerOperand(), in vectorizeStoreChain()
1113 DL, S0, nullptr, &DT); in vectorizeStoreChain()
1164 Builder.CreateBitCast(S0->getPointerOperand(), VecTy->getPointerTo(AS)), in vectorizeStoreChain()
/freebsd-12-stable/sys/contrib/libsodium/src/libsodium/crypto_hash/sha256/cp/
Dhash_sha256_cp.c78 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) macro
86 h += S0(a) + Maj(a, b, c);
/freebsd-12-stable/sys/contrib/libsodium/src/libsodium/crypto_hash/sha512/cp/
Dhash_sha512_cp.c94 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) macro
102 h += S0(a) + Maj(a, b, c);
/freebsd-12-stable/usr.sbin/moused/
Dmoused.c466 #define S0 0 /* start */ macro
488 { { S0, S2, S1, S3, S0 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), FALSE },
494 { { S0, S9, S9, S3, S3 }, MOUSE_BUTTON2DOWN, ~0, FALSE },
496 { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON1DOWN, ~0, TRUE },
498 { { S0, S2, S5, S7, S5 }, MOUSE_BUTTON1DOWN, ~0, FALSE },
500 { { S0, S6, S1, S7, S6 }, MOUSE_BUTTON3DOWN, ~0, FALSE },
502 { { S0, S6, S5, S7, S7 }, MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN, ~0, FALSE },
504 { { S0, S2, S1, S3, S0 }, MOUSE_BUTTON3DOWN, ~0, TRUE },
506 { { S0, S9, S9, S3, S9 }, 0, ~(MOUSE_BUTTON1DOWN | MOUSE_BUTTON3DOWN), FALSE },
1055 mouse_button_state = S0; in moused()
/freebsd-12-stable/crypto/heimdal/appl/ftp/ftp/
Dmain.c434 S0: in slurpstring()
442 sb++; goto S0; in slurpstring()
/freebsd-12-stable/sys/crypto/sha2/
Dsha256c.c107 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) macro
116 h += S0(a) + Maj(a, b, c);
Dsha512c.c136 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) macro
145 h += S0(a) + Maj(a, b, c);
/freebsd-12-stable/lib/libc/mips/gen/
Dmakecontext.c86 mc->mc_regs[S0] = (intptr_t)ucp; in __makecontext()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/
DVE.td36 // Use both VE register name matcher to accept "S0~S63" register names
/freebsd-12-stable/sys/mips/include/
Dregnum.h83 #define S0 16 macro
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/
DARMCallingConv.td79 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
99 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
227 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
247 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
/freebsd-12-stable/contrib/gcc/config/s390/
Ds390.md373 tm\t%S0,%b1
374 tmy\t%S0,%b1"
475 icm\t%2,15,%S0
476 icmy\t%2,15,%S0"
487 icm\t%2,15,%S0
488 icmy\t%2,15,%S0"
519 icm\t%2,<icm_lo>,%S0
520 icmy\t%2,<icm_lo>,%S0
531 icm\t%2,3,%S0
532 icmy\t%2,3,%S0
[all …]
/freebsd-12-stable/sys/mips/mips/
Dexception.S296 SAVE_REG(s0, S0, sp) ;\
356 RESTORE_REG(s0, S0, sp) ;\
455 SAVE_U_PCB_REG(s0, S0, k1)
548 RESTORE_U_PCB_REG(s0, S0, k1)
725 SAVE_U_PCB_REG(s0, S0, k1)
807 RESTORE_U_PCB_REG(s0, S0, k1)
/freebsd-12-stable/contrib/file/magic/Magdir/
Dmotorola33 0 string S0 Motorola S-Record; binary data in text format
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/
DConstantFolding.cpp2755 const APFloat &S0, in ConstantFoldAMDGCNCubeIntrinsic() argument
2759 const fltSemantics &Sem = S0.getSemantics(); in ConstantFoldAMDGCNCubeIntrinsic()
2761 if (abs(S2) >= abs(S0) && abs(S2) >= abs(S1)) { in ConstantFoldAMDGCNCubeIntrinsic()
2765 SC = -S0; in ConstantFoldAMDGCNCubeIntrinsic()
2768 SC = S0; in ConstantFoldAMDGCNCubeIntrinsic()
2772 } else if (abs(S1) >= abs(S0)) { in ConstantFoldAMDGCNCubeIntrinsic()
2782 SC = S0; in ConstantFoldAMDGCNCubeIntrinsic()
2784 if (S0.isNegative() && S0.isNonZero() && !S0.isNaN()) { in ConstantFoldAMDGCNCubeIntrinsic()
2792 MA = S0; in ConstantFoldAMDGCNCubeIntrinsic()

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