Searched refs:RSQ (Results 1 – 8 of 8) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 409 RSQ, enumerator
|
| D | AMDGPUInstrInfo.td | 118 def AMDGPUrsq_impl : SDNode<"AMDGPUISD::RSQ", SDTFPUnaryOp>;
|
| D | AMDGPUISelLowering.cpp | 4374 NODE_NAME_CASE(RSQ) in getTargetNodeName()
4488 return DAG.getNode(AMDGPUISD::RSQ, SDLoc(Operand), VT, Operand); in getSqrtEstimate()
4763 case AMDGPUISD::RSQ: in isKnownNeverNaNForTargetNode()
|
| D | SIISelLowering.cpp | 6497 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
6514 SDValue Rsq = DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
8295 return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0)); in lowerFastUnsafeFDIV()
9473 return DCI.DAG.getNode(AMDGPUISD::RSQ, SDLoc(N), VT, in performRcpCombine()
9515 case AMDGPUISD::RSQ: in isCanonicalized()
10854 case AMDGPUISD::RSQ: in PerformDAGCombine()
|
| D | R600ISelLowering.cpp | 615 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerOperation()
|
| D | AMDGPUISelDAGToDAG.cpp | 450 case AMDGPUISD::RSQ: in fp16SrcZerosHighBits()
|
| /freebsd-12-stable/contrib/binutils/opcodes/ |
| D | ppc-opc.c | 400 #define RSQ RS + 1 macro
401 #define RTQ RSQ
405 #define RSO RSQ + 1
4493 { "stq", DSO(62,2), DS_MASK, POWER4, { RSQ, DS, RA0 } },
|
| D | ChangeLog-0203 | 533 * ppc-opc.c (DQ, RAQ, RSQ, RTQ): Define.
|