Home
last modified time | relevance | path

Searched refs:RREG32_MC (Results 1 – 6 of 6) sorted by relevance

/freebsd-12-stable/sys/dev/drm2/radeon/
Drs400.c69 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); in rs400_gart_tlb_flush()
115 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_enable()
198 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_disable()
303 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_debugfs_gart_info()
306 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE); in rs400_debugfs_gart_info()
308 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2); in rs400_debugfs_gart_info()
310 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); in rs400_debugfs_gart_info()
312 tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION); in rs400_debugfs_gart_info()
324 tmp = RREG32_MC(RS480_GART_BASE); in rs400_debugfs_gart_info()
326 tmp = RREG32_MC(RS480_GART_FEATURE_ID); in rs400_debugfs_gart_info()
[all …]
Drs600.c463 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
467 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
471 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
474 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
547 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_enable()
549 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_enable()
565 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_disable()
791 if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS))) in rs600_mc_wait_for_idle()
818 base = RREG32_MC(R_000004_MC_FB_LOCATION); in rs600_mc_init()
Dr520.c47 tmp = RREG32_MC(R520_MC_STATUS); in r520_mc_wait_for_idle()
104 tmp = RREG32_MC(R520_MC_CNTL0); in r520_vram_get_type()
Drs690.c45 tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS); in rs690_mc_wait_for_idle()
164 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); in rs690_mc_init()
426 tmp = RREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER); in rs690_bandwidth_update()
Drv515.c141 tmp = RREG32_MC(MC_STATUS); in rv515_mc_wait_for_idle()
188 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK; in rv515_vram_get_type()
1240 tmp = RREG32_MC(MC_MISC_LAT_TIMER); in rv515_bandwidth_update()
Dradeon.h1698 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) macro