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Searched refs:RR (Results 1 – 25 of 94) sorted by relevance

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/freebsd-12-stable/contrib/binutils/include/opcode/
Dspu-insns.h143 APUOP(M_STOP, RR, 0x000, "stop", _A0(), 00000, BR) /* STOP stop */
144 APUOP(M_STOP2, RR, 0x000, "stop", _A1(A_U14), 00000, BR) /* STOP stop */
145 APUOP(M_STOPD, RR, 0x140, "stopd", _A3(A_T,A_A,A_B), 00111, BR) /* STOPD stop (wit…
146 APUOP(M_LNOP, RR, 0x001, "lnop", _A0(), 00000, LNOP) /* LNOP no_operation */
147 APUOP(M_SYNC, RR, 0x002, "sync", _A0(), 00000, BR) /* SYNC flush_pipe */
148 APUOP(M_DSYNC, RR, 0x003, "dsync", _A0(), 00000, BR) /* DSYNC flush_store_queue */
149 APUOP(M_MFSPR, RR, 0x00c, "mfspr", _A2(A_T,A_S), 00002, SPR) /* MFSPR RT<-SA */
150 APUOP(M_RDCH, RR, 0x00d, "rdch", _A2(A_T,A_H), 00002, SPR) /* ReaDCHannel RT<-CA:data */
151 APUOP(M_RCHCNT, RR, 0x00f, "rchcnt", _A2(A_T,A_H), 00002, SPR) /* ReaDCHanCouNT RT<-CA:count */
160 APUOP(M_MTSPR, RR, 0x10c, "mtspr", _A2(A_S,A_T), 00001, SPR) /* MTSPR SA<-RT */
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
DRDFRegisters.cpp167 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const { in aliasRM() argument
168 assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg)); in aliasRM()
170 bool Preserved = MB[RR.Reg/32] & (1u << (RR.Reg%32)); in aliasRM()
174 if (RR.Mask == LaneBitmask::getAll()) in aliasRM()
176 const TargetRegisterClass *RC = RegInfos[RR.Reg].RegClass; in aliasRM()
177 if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask) in aliasRM()
185 LaneBitmask M = RR.Mask; in aliasRM()
186 for (MCSubRegIndexIterator SI(RR.Reg, &TRI); SI.isValid(); ++SI) { in aliasRM()
188 if ((SM & RR.Mask).none()) in aliasRM()
230 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const { in mapTo() argument
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DRDFGraph.cpp418 void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) { in setRegRef() argument
421 Ref.PR = G.pack(RR); in setRegRef()
816 RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) { in newPhiUse() argument
819 PUA.Addr->setRegRef(RR, *this); in newPhiUse()
832 RegisterRef RR, uint16_t Flags) { in newDef() argument
835 DA.Addr->setRegRef(RR, *this); in newDef()
909 RegisterRef RR = *I; in build() local
912 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags); in build()
934 for (RegisterRef RR : EHRegs) { in build() local
938 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags); in build()
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DRegisterClassInfo.cpp74 const BitVector &RR = MF->getRegInfo().getReservedRegs(); in runOnMachineFunction() local
75 if (Reserved.size() != RR.size() || RR != Reserved) { in runOnMachineFunction()
77 Reserved = RR; in runOnMachineFunction()
DRDFLiveness.cpp148 RegisterRef RR = TA.Addr->getRegRef(DFG); in getAllReachingDefs() local
150 if (RegisterAggr::isCoverOf(RR, RefRR, PRI)) in getAllReachingDefs()
660 auto ClearIn = [] (RegisterRef RR, const RegisterAggr &Mid, SubMap &SM) { in computePhiInfo() argument
662 return RR; in computePhiInfo()
663 auto F = SM.find(RR); in computePhiInfo()
666 RegisterRef S = Mid.clearIn(RR); in computePhiInfo()
667 SM.insert({RR, S}); in computePhiInfo()
729 RegisterRef RR = NodeAddr<DefNode*>(Ds[0]).Addr->getRegRef(DFG); in computePhiInfo() local
730 dbgs() << '<' << Print<RegisterRef>(RR, DFG) << '>'; in computePhiInfo()
1130 RegisterRef RR = UA.Addr->getRegRef(DFG); in traverse() local
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DRDFRegisters.h83 bool operator== (const RegisterRef &RR) const {
84 return Reg == RR.Reg && Mask == RR.Mask;
87 bool operator!= (const RegisterRef &RR) const {
88 return !operator==(RR);
91 bool operator< (const RegisterRef &RR) const {
92 return Reg < RR.Reg || (Reg == RR.Reg && Mask < RR.Mask);
138 RegisterRef mapTo(RegisterRef RR, unsigned R) const;
164 bool aliasRM(RegisterRef RR, RegisterRef RM) const;
175 bool hasAliasOf(RegisterRef RR) const;
176 bool hasCoverOf(RegisterRef RR) const;
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DRDFGraph.h525 void setRegRef(RegisterRef RR, DataFlowGraph &G);
553 NodeAddr<RefNode*> getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
740 PackedRegisterRef pack(RegisterRef RR) { in pack()
741 return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) }; in pack()
743 PackedRegisterRef pack(RegisterRef RR) const { in pack()
744 return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) }; in pack()
823 RegisterRef RR, NodeAddr<BlockNode*> PredB,
828 RegisterRef RR, uint16_t Flags = NodeAttrs::PhiRef);
883 NodeAddr<RefNode*> RefNode::getNextRef(RegisterRef RR, Predicate P, in getNextRef() argument
892 if (RA.Addr->getRegRef(G) == RR && P(NA)) in getNextRef()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
DResourceManager.cpp194 void ResourceManager::use(const ResourceRef &RR) { in use() argument
196 unsigned RSID = getResourceStateIndex(RR.first); in use()
198 RS.markSubResourceAsUsed(RR.second); in use()
202 Strategies[RSID]->used(RR.second); in use()
209 AvailableProcResUnits ^= RR.first; in use()
217 CurrentUser.markSubResourceAsUsed(RR.first); in use()
218 Strategies[GroupIndex]->used(RR.first); in use()
224 void ResourceManager::release(const ResourceRef &RR) { in release() argument
225 unsigned RSID = getResourceStateIndex(RR.first); in release()
228 RS.releaseSubResource(RR.second); in release()
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/freebsd-12-stable/crypto/openssh/
DREADME.dns10 (1) Server: Generate and publish the DNS RR
12 To create a DNS resource record (RR) containing a fingerprint of the
19 you should generate one RR for each key.
22 generic DNS RR format parsable by most modern name server
23 implementations. If your nameserver has support for the SSHFP RR
24 you can omit the -g flag and ssh-keygen will print a standard SSHFP RR.
26 To publish the fingerprint using the DNS you must add the generated RR
38 Upon connection the client will try to look up the fingerprint RR
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp183 bool operator== (RegisterRef RR) const { in operator ==()
184 return Reg == RR.Reg && Sub == RR.Sub; in operator ==()
186 bool operator!= (RegisterRef RR) const { return !operator==(RR); } in operator !=()
187 bool operator< (RegisterRef RR) const { in operator <()
188 return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub); in operator <()
203 void addRefToMap(RegisterRef RR, ReferenceMap &Map, unsigned Exec);
236 bool isIntReg(RegisterRef RR, unsigned &BW);
295 void HexagonExpandCondsets::addRefToMap(RegisterRef RR, ReferenceMap &Map, in addRefToMap() argument
297 unsigned Mask = getMaskForSub(RR.Sub) | Exec; in addRefToMap()
298 ReferenceMap::iterator F = Map.find(RR.Reg); in addRefToMap()
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DBitTracker.cpp329 uint16_t BT::MachineEvaluator::getRegBitWidth(const RegisterRef &RR) const { in getRegBitWidth()
338 if (RR.Reg.isVirtual()) { in getRegBitWidth()
339 const auto &VC = composeWithSubRegIndex(*MRI.getRegClass(RR.Reg), RR.Sub); in getRegBitWidth()
342 assert(RR.Reg.isPhysical()); in getRegBitWidth()
344 (RR.Sub == 0) ? RR.Reg.asMCReg() : TRI.getSubReg(RR.Reg, RR.Sub); in getRegBitWidth()
348 BT::RegisterCell BT::MachineEvaluator::getCell(const RegisterRef &RR, in getCell() argument
350 uint16_t BW = getRegBitWidth(RR); in getCell()
354 if (RR.Reg.isPhysical()) in getCell()
357 assert(RR.Reg.isVirtual()); in getCell()
360 const TargetRegisterClass *C = MRI.getRegClass(RR.Reg); in getCell()
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DRDFCopy.cpp121 auto MinPhysReg = [this] (RegisterRef RR) -> unsigned { in run() argument
123 const TargetRegisterClass &RC = *TRI.getMinimalPhysRegClass(RR.Reg); in run()
124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) in run()
125 return RR.Reg; in run()
126 for (MCSubRegIndexIterator S(RR.Reg, &TRI); S.isValid(); ++S) in run()
127 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex())) in run()
DBitTracker.h53 RegisterCell get(RegisterRef RR) const;
54 void put(RegisterRef RR, const RegisterCell &RC);
397 uint16_t getRegBitWidth(const RegisterRef &RR) const;
399 RegisterCell getCell(const RegisterRef &RR, const CellMapType &M) const;
400 void putCell(const RegisterRef &RR, RegisterCell RC, CellMapType &M) const;
405 RegisterCell getRef(const RegisterRef &RR, const CellMapType &M) const { in getRef()
406 RegisterCell RC = getCell(RR, M); in getRef()
/freebsd-12-stable/crypto/openssl/crypto/bn/
Dbn_mont.c225 return bn_mul_mont_fixed_top(r, a, &(mont->RR), mont, ctx); in bn_to_mont_fixed_top()
245 bn_init(&ctx->RR); in BN_MONT_CTX_init()
256 BN_clear_free(&mont->RR); in BN_MONT_CTX_free()
274 R = &(mont->RR); /* grab RR as a temp */ in BN_MONT_CTX_set()
394 BN_zero(&(mont->RR)); in BN_MONT_CTX_set()
395 if (!BN_set_bit(&(mont->RR), mont->ri * 2)) in BN_MONT_CTX_set()
397 if (!BN_mod(&(mont->RR), &(mont->RR), &(mont->N), ctx)) in BN_MONT_CTX_set()
400 for (i = mont->RR.top, ret = mont->N.top; i < ret; i++) in BN_MONT_CTX_set()
401 mont->RR.d[i] = 0; in BN_MONT_CTX_set()
402 mont->RR.top = ret; in BN_MONT_CTX_set()
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Drsaz_exp.h31 const BN_ULONG m_norm[16], const BN_ULONG RR[16],
38 const BN_ULONG RR[8]);
Drsaz_exp.c59 const BN_ULONG m_norm[16], const BN_ULONG RR[16],
83 rsaz_1024_norm2red_avx2(R2, RR);
264 const BN_ULONG m[8], BN_ULONG k0, const BN_ULONG RR[8])
287 rsaz_512_mul(a_inv, base, RR, m, k0);
/freebsd-12-stable/sys/arm/broadcom/bcm2835/
Dbcm2835_pwm.c365 #define RR(x,y) \ in bcm_pwm_sysctl_init() macro
370 RR(24, "DAT2") in bcm_pwm_sysctl_init()
371 RR(20, "RNG2") in bcm_pwm_sysctl_init()
372 RR(18, "FIF1") in bcm_pwm_sysctl_init()
373 RR(14, "DAT1") in bcm_pwm_sysctl_init()
374 RR(10, "RNG1") in bcm_pwm_sysctl_init()
375 RR(08, "DMAC") in bcm_pwm_sysctl_init()
376 RR(04, "STA") in bcm_pwm_sysctl_init()
377 RR(00, "CTL") in bcm_pwm_sysctl_init()
378 #undef RR in bcm_pwm_sysctl_init()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/MCA/Stages/
DExecuteStage.cpp103 for (const ResourceRef &RR : Freed) in cycleStart() local
104 notifyResourceAvailable(RR); in cycleStart()
245 void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) const { in notifyResourceAvailable()
246 LLVM_DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.' in notifyResourceAvailable()
247 << RR.second << "]\n"); in notifyResourceAvailable()
249 Listener->onResourceAvailable(RR); in notifyResourceAvailable()
/freebsd-12-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
DPointerSubChecker.cpp45 const MemRegion *RR = RV.getAsRegion(); in checkPreStmt() local
47 if (!(LR && RR)) in checkPreStmt()
51 const MemRegion *BaseRR = RR->getBaseRegion(); in checkPreStmt()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/
DVEInstrInfo.td531 // Multiclass for generic RR type instructions
539 def rr : RR<opc, (outs RCo:$sx), (ins RCi:$sy, RCi:$sz),
545 def ri : RR<opc, (outs RCo:$sx), (ins RCi:$sz, immOp:$sy),
549 def rm : RR<opc, (outs RCo:$sx), (ins RCi:$sy, mOp:$sz),
553 def im : RR<opc, (outs RCo:$sx), (ins immOp:$sy, mOp:$sz),
563 // Multiclass for non-commutative RR type instructions
570 def rr : RR<opc, (outs RCo:$sx), (ins RCi:$sy, RCi:$sz),
574 def ir : RR<opc, (outs RCo:$sx), (ins immOp:$sy, RCi:$sz),
578 def rm : RR<opc, (outs RCo:$sx), (ins RCi:$sy, mOp:$sz),
582 def im : RR<opc, (outs RCo:$sx), (ins immOp:$sy, mOp:$sz),
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/freebsd-12-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/
DResourcePressureView.cpp59 const ResourceRef &RR = Use.first; in onEvent() local
60 assert(Resource2VecIndex.find(RR.first) != Resource2VecIndex.end()); in onEvent()
61 unsigned R2VIndex = Resource2VecIndex[RR.first]; in onEvent()
62 R2VIndex += countTrailingZeros(RR.second); in onEvent()
/freebsd-12-stable/contrib/binutils/gas/config/
Dtc-arm.c14962 tCE(and, 0000000, and, 3, (RR, oRR, SH), arit, t_arit3c),
14963 tC3(ands, 0100000, ands, 3, (RR, oRR, SH), arit, t_arit3c),
14964 tCE(eor, 0200000, eor, 3, (RR, oRR, SH), arit, t_arit3c),
14965 tC3(eors, 0300000, eors, 3, (RR, oRR, SH), arit, t_arit3c),
14966 tCE(sub, 0400000, sub, 3, (RR, oRR, SH), arit, t_add_sub),
14967 tC3(subs, 0500000, subs, 3, (RR, oRR, SH), arit, t_add_sub),
14968 tCE(add, 0800000, add, 3, (RR, oRR, SHG), arit, t_add_sub),
14969 tC3(adds, 0900000, adds, 3, (RR, oRR, SHG), arit, t_add_sub),
14970 tCE(adc, 0a00000, adc, 3, (RR, oRR, SH), arit, t_arit3c),
14971 tC3(adcs, 0b00000, adcs, 3, (RR, oRR, SH), arit, t_arit3c),
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/freebsd-12-stable/contrib/ldns/
DChangelog9 * Filter out specified RR types with ldns-read-zone -e and -E options
41 * bugfix #570: Add TLSA, CDS, CDNSKEY and OPENPGPKEY RR types to ldnsx
55 * RFC7553 RR Type URI is supported by default.
63 * bugfix #725: allow RR-types on the type bitmap window border
102 * Include OPENPGPKEY RR type by default
103 * rdata processing for SMIMEA RR type
104 * Fix crash in displaying TLSA RR's.
132 * New RR type TKEY, but without operational practice.
133 * New RR types HIP, NINFO, RKEY, CDS, EUI48, EUI64, URI, CAA and TA.
135 RR's as unknown type
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/freebsd-12-stable/contrib/gcc/config/s390/
Ds390.md152 "NN,E,RR,RRE,RX,RS,RSI,RI,SI,S,SS,SSE,RXE,RSE,RIL,RIE,RXY,RSY,SIY"
174 (if_then_else (eq_attr "op_type" "E,RR,RI,RRE")
181 (cond [(eq_attr "op_type" "E,RR") (const_int 2)
264 ;; In FPR templates, "<RRe>" will expand to "RRE" in TFmode and "RR" otherwise.
266 (define_mode_attr RRe [(TF "RRE") (DF "RR") (SF "RR")])
292 ;; in "RRE" for DImode and "RR" for SImode.
442 [(set_attr "op_type" "RR<E>,RXY")])
454 [(set_attr "op_type" "RR<E>,RXY")])
477 [(set_attr "op_type" "RR,RS,RSY")])
489 [(set_attr "op_type" "RR,RS,RSY")])
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/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/Orc/
DOrcRPCExecutorProcessControl.h317 std::vector<orcrpctpc::RemoteLookupRequest> RR; in lookupSymbols() local
319 RR.push_back({}); in lookupSymbols()
320 RR.back().first = E.Handle; in lookupSymbols()
322 RR.back().second.push_back( in lookupSymbols()
338 return EP.template callB<orcrpctpc::LookupSymbols>(RR); in lookupSymbols()

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