Searched refs:RD2 (Results 1 – 6 of 6) sorted by relevance
| /freebsd-12-stable/sys/arm/freescale/imx/ |
| D | imx_wdog.c | 88 RD2(struct imx_wdog_softc *sc, bus_size_t offs) in RD2() function
112 reg = RD2(sc, WDOG_CR_REG); in imx_wdog_enable()
123 reg = RD2(sc, WDOG_MCR_REG); in imx_wdog_enable()
207 WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG)); in imx_wdog_attach()
218 if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE) in imx_wdog_attach()
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| /freebsd-12-stable/sys/dev/sdhci/ |
| D | sdhci.c | 83 #define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off)) macro
208 RD4(slot, SDHCI_DMA_ADDRESS), RD2(slot, SDHCI_HOST_VERSION)); in sdhci_dumpregs()
210 RD2(slot, SDHCI_BLOCK_SIZE), RD2(slot, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs()
212 RD4(slot, SDHCI_ARGUMENT), RD2(slot, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs()
218 RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
224 RD2(slot, SDHCI_ACMD12_ERR), RD2(slot, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
230 RD4(slot, SDHCI_ADMA_ADDRESS_LO), RD2(slot, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs()
349 clk = RD2(slot, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
358 clk_sel = RD2(slot, BCM577XX_HOST_CONTROL) & in sdhci_set_clock()
418 while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL)) in sdhci_set_clock()
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| /freebsd-12-stable/sys/dev/ffec/ |
| D | if_ffec.c | 211 RD2(struct ffec_softc *sc, bus_size_t off) in RD2() function
295 while (RD2(sc, FEC_MIIGSK_ENR) & FEC_MIIGSK_ENR_READY) in ffec_miigasket_setup()
301 while (!(RD2(sc, FEC_MIIGSK_ENR) & FEC_MIIGSK_ENR_READY)) in ffec_miigasket_setup()
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| /freebsd-12-stable/sys/arm/broadcom/bcm2835/ |
| D | bcm2835_sdhost.c | 256 RD2(struct bcm_sdhost_softc *sc, bus_size_t off) in RD2() function
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| /freebsd-12-stable/contrib/llvm-project/clang/lib/Sema/ |
| D | SemaChecking.cpp | 15876 RecordDecl *RD2) { in isLayoutCompatibleStruct() argument
15881 const CXXRecordDecl *D2CXX = cast<CXXRecordDecl>(RD2); in isLayoutCompatibleStruct()
15896 } else if (const CXXRecordDecl *D2CXX = dyn_cast<CXXRecordDecl>(RD2)) { in isLayoutCompatibleStruct()
15903 RecordDecl::field_iterator Field2 = RD2->field_begin(), in isLayoutCompatibleStruct()
15904 Field2End = RD2->field_end(), in isLayoutCompatibleStruct()
15920 RecordDecl *RD2) { in isLayoutCompatibleUnion() argument
15922 for (auto *Field2 : RD2->fields()) in isLayoutCompatibleUnion()
15946 RecordDecl *RD2) { in isLayoutCompatible() argument
15947 if (RD1->isUnion() != RD2->isUnion()) in isLayoutCompatible()
15951 return isLayoutCompatibleUnion(C, RD1, RD2); in isLayoutCompatible()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3142 Register RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() local
3143 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), RD2) in emitMSACBranchPseudo()
3151 .addReg(RD2) in emitMSACBranchPseudo()
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