| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRRegisterInfo.td | 66 def R22 : AVRReg<22, "r22">, DwarfRegNum<[22]>;
94 def R23R22 : AVRReg<22, "r23:r22", [R22, R23]>, DwarfRegNum<[22]>;
110 def R22R21 : AVRReg<21, "r22:r21", [R21, R22]>, DwarfRegNum<[21]>;
127 add R24, R25, R18, R19, R20, R21, R22, R23,
145 add R24, R25, R18, R19, R20, R21, R22, R23,
155 add R23, R22, R21, R20, R19, R18, R17, R16
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| D | AVRISelLowering.cpp | 1002 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| D | ARCRegisterInfo.td | 54 def R22 : Core<22, "%r22">, DwarfRegNum<[22]>;
73 R20, R21, R22, R23, R24, R25, GP, FP, SP, ILINK, R30, BLINK)>;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiBaseInfo.h | 93 case Lanai::R22: in getLanaiRegisterNumbering()
|
| /freebsd-12-stable/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/ |
| D | poly1305_sse2.c | 211 xmmi R20, R21, R22, R23, R24, S21, S22, S23, S24; in poly1305_blocks() local
269 R22 = _mm_shuffle_epi32(T5, _MM_SHUFFLE(1, 1, 0, 0)); in poly1305_blocks()
277 R22 = _mm_shuffle_epi32(T0, _MM_SHUFFLE(2, 2, 2, 2)); in poly1305_blocks()
282 S22 = _mm_mul_epu32(R22, FIVE); in poly1305_blocks()
473 T14 = R22; in poly1305_blocks()
595 T14 = R22; in poly1305_blocks()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 122 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
131 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in getCalleeSavedRegs()
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| D | HexagonFrameLowering.h | 96 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 }, in getCalleeSavedSpillSlots()
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| D | HexagonRegisterInfo.td | 123 def D11 : Rd<22, "r23:22", [R22, R23]>, DwarfRegNum<[54]>;
378 (add R23, R22, R21, R20, R19, R18, R17, R16,
448 : CalleeSavedRegs<(add R16, R17, R18, R19, R20, R21, R22, R23,
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| D | HexagonFrameLowering.cpp | 1077 Hexagon::R21, Hexagon::R20, Hexagon::R23, Hexagon::R22, in insertCFIInstructionsAt()
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| D | HexagonISelLowering.cpp | 294 .Case("r22", Hexagon::R22) in getRegisterByName()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| D | LanaiDisassembler.cpp | 159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| D | AVRDisassembler.cpp | 66 AVR::R20, AVR::R21, AVR::R22, AVR::R23,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 272 R21, R22, R23, R24, R25, R26, R27,
288 R21, R22, R23, R24, R25, R26, R27, R28,
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| D | PPCFrameLowering.cpp | 128 {PPC::R22, -40}, \ in getCalleeSavedSpillSlots()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 120 ARC::R21, ARC::R22, ARC::R23, ARC::R24, ARC::R25, ARC::GP, ARC::FP,
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 552 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, in DecodeIntRegsRegisterClass()
567 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, in DecodeGeneralSubRegsRegisterClass()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| D | CSKYRegisterInfo.td | 74 def R22 : CSKYReg<22, "r22", ["t6"]>, DwarfRegNum<[22]>;
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCChecker.cpp | 687 Register = Hexagon::R22; in compoundRegisterMap()
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| D | HexagonMCDuplexInfo.cpp | 686 case Hexagon::R22: in addOps()
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| D | HexagonMCInstrInfo.cpp | 296 case R22: in getDuplexRegisterNumbering()
|
| /freebsd-12-stable/contrib/libstdc++/ |
| D | ChangeLog-2002 | 2116 Import from upstream, R22.
|