Searched refs:PVT (Results 1 – 6 of 6) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/ |
| D | WebAssemblyAsmTypeCheck.cpp | 92 auto PVT = Stack.back(); in popType() local 94 if (EVT.hasValue() && EVT.getValue() != PVT) { in popType() 96 ErrorLoc, StringRef("popped ") + WebAssembly::typeToString(PVT) + in popType() 118 auto PVT = Stack[Stack.size() - LastSig.Returns.size() + i]; in checkEnd() local 119 if (PVT != EVT) in checkEnd() 121 ErrorLoc, StringRef("end got ") + WebAssembly::typeToString(PVT) + in checkEnd()
|
| /freebsd-12-stable/sys/gnu/dts/arm/ |
| D | aspeed-bmc-opp-zaius.dts | 380 * These are the PVT (and presumably beyond) addresses:
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 380 SDValue PromoteOperand(SDValue Op, EVT PVT, bool &Replace); 381 SDValue SExtPromoteOperand(SDValue Op, EVT PVT); 382 SDValue ZExtPromoteOperand(SDValue Op, EVT PVT); 1209 SDValue DAGCombiner::PromoteOperand(SDValue Op, EVT PVT, bool &Replace) { in PromoteOperand() argument 1218 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand() 1227 if (SDValue Op0 = SExtPromoteOperand(Op.getOperand(0), PVT)) in PromoteOperand() 1228 return DAG.getNode(ISD::AssertSext, DL, PVT, Op0, Op.getOperand(1)); in PromoteOperand() 1231 if (SDValue Op0 = ZExtPromoteOperand(Op.getOperand(0), PVT)) in PromoteOperand() 1232 return DAG.getNode(ISD::AssertZext, DL, PVT, Op0, Op.getOperand(1)); in PromoteOperand() 1237 return DAG.getNode(ExtOpc, DL, PVT, Op); in PromoteOperand() [all …]
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 11435 MVT PVT = getPointerTy(MF->getDataLayout()); in emitEHSjLjSetJmp() local 11436 assert((PVT == MVT::i64 || PVT == MVT::i32) && in emitEHSjLjSetJmp() 11479 const int64_t LabelOffset = 1 * PVT.getStoreSize(); in emitEHSjLjSetJmp() 11480 const int64_t TOCOffset = 3 * PVT.getStoreSize(); in emitEHSjLjSetJmp() 11481 const int64_t BPOffset = 4 * PVT.getStoreSize(); in emitEHSjLjSetJmp() 11484 const TargetRegisterClass *PtrRC = getRegClassFor(PVT); in emitEHSjLjSetJmp() 11567 MVT PVT = getPointerTy(MF->getDataLayout()); in emitEHSjLjLongJmp() local 11568 assert((PVT == MVT::i64 || PVT == MVT::i32) && in emitEHSjLjLongJmp() 11572 (PVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in emitEHSjLjLongJmp() 11575 unsigned FP = (PVT == MVT::i64) ? PPC::X31 : PPC::R31; in emitEHSjLjLongJmp() [all …]
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 8393 EVT PVT = LD->getValueType(0); in LowerAsSplatVectorLoad() local 8394 if (PVT != MVT::i32 && PVT != MVT::f32) in LowerAsSplatVectorLoad() 8445 EVT NVT = EVT::getVectorVT(*DAG.getContext(), PVT, NumElems); in LowerAsSplatVectorLoad() 8925 MVT PVT = TLI.getPointerTy(DAG.getDataLayout()); in lowerBuildVectorAsBroadcast() local 8934 SDValue CP = DAG.getConstantPool(C, PVT); in lowerBuildVectorAsBroadcast() 8952 SDValue VCP = DAG.getConstantPool(VecC, PVT); in lowerBuildVectorAsBroadcast() 16071 MVT PVT = VT.isFloatingPoint() ? MVT::v4f64 : MVT::v4i64; in lowerShuffleAsLanePermuteAndShuffle() local 16072 SDValue Flipped = DAG.getBitcast(PVT, V1); in lowerShuffleAsLanePermuteAndShuffle() 16074 DAG.getVectorShuffle(PVT, DL, Flipped, DAG.getUNDEF(PVT), {2, 3, 0, 1}); in lowerShuffleAsLanePermuteAndShuffle() 33493 MVT PVT = getPointerTy(MF->getDataLayout()); in emitSetJmpShadowStackFix() local [all …]
|
| D | X86ISelLowering.h | 968 bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const override;
|