Searched refs:PIPECONF (Results 1 – 7 of 7) sorted by relevance
1015 int reg = PIPECONF(cpu_transcoder); in intel_wait_for_pipe_off()1226 reg = PIPECONF(cpu_transcoder); in assert_pipe()1686 pipeconf_val = I915_READ(PIPECONF(pipe)); in ironlake_enable_pch_transcoder()1730 pipeconf_val = I915_READ(PIPECONF(cpu_transcoder)); in lpt_enable_pch_transcoder()1834 reg = PIPECONF(cpu_transcoder); in intel_enable_pipe()1873 reg = PIPECONF(cpu_transcoder); in intel_disable_pipe()2824 temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11; in ironlake_fdi_pll_enable()2898 temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11; in ironlake_fdi_disable()2927 temp |= (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) << 11; in ironlake_fdi_disable()3160 u32 bpc = (I915_READ(PIPECONF(pipe)) & PIPE_BPC_MASK) >> 5; in ironlake_pch_enable()[all …]
485 pipeconf_reg = PIPECONF(pipe); in intel_crt_load_detect()
444 if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) in intel_update_plane()
1090 int pipeconf_reg = PIPECONF(pipe); in intel_tv_mode_set()
839 … (I915_READ(PIPECONF(crtc->pipe)) & (PIPECONF_DOUBLE_WIDE | PIPECONF_ENABLE)) != PIPECONF_ENABLE) in check_overlay_possible_on_crtc()
2732 #define PIPECONF(tran) _TRANSCODER(tran, _PIPEACONF, _PIPEBCONF) macro
131 return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE; in i915_pipe_enabled()