Searched refs:OutVal (Results 1 – 5 of 5) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 342 SDValue OutVal = OutVals[i]; in LowerReturn() local
349 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
352 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
355 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
368 OutVal = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, DL, in LowerReturn()
369 MVT::i64, Undef, OutVal, Sub_f32), in LowerReturn()
377 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 317 SDValue OutVal = OutVals[i]; in LowerReturn_64() local
323 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
326 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
329 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
338 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
345 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
351 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn_64()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| D | InstrRefBasedImpl.cpp | 2848 const DbgValue &OutVal = It->second; in pickVPHILoc() local
2850 if (OutVal.Kind == DbgValue::Const || OutVal.Kind == DbgValue::NoVal) in pickVPHILoc()
2854 assert(OutVal.Kind == DbgValue::Proposed || OutVal.Kind == DbgValue::Def); in pickVPHILoc()
2855 ValueIDNum ValToLookFor = OutVal.ID; in pickVPHILoc()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1600 SDValue OutVal = N->getOperand(3); in PerformDAGCombine() local
1602 if (OutVal.hasOneUse()) { in PerformDAGCombine()
1603 unsigned BitWidth = OutVal.getValueSizeInBits(); in PerformDAGCombine()
1609 if (TLI.ShrinkDemandedConstant(OutVal, DemandedMask, TLO) || in PerformDAGCombine()
1610 TLI.SimplifyDemandedBits(OutVal, DemandedMask, Known, TLO)) in PerformDAGCombine()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 942 SDValue &OutVal = OutVals[I]; in LowerCall() local
962 Chain, DL, FINode, OutVal, SizeNode, Out.Flags.getNonZeroByValAlign(), in LowerCall()
965 OutVal = FINode; in LowerCall()
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