| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyPeephole.cpp | 60 static bool maybeRewriteToDrop(unsigned OldReg, unsigned NewReg, in maybeRewriteToDrop() argument 64 if (OldReg == NewReg) { in maybeRewriteToDrop() 66 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in maybeRewriteToDrop() local 67 MO.setReg(NewReg); in maybeRewriteToDrop() 69 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToDrop() 123 Register NewReg = MRI.createVirtualRegister(RegClass); in maybeRewriteToFallthrough() local 124 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) in maybeRewriteToFallthrough() 126 MO.setReg(NewReg); in maybeRewriteToFallthrough() 127 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToFallthrough() 170 Register NewReg = Op2.getReg(); in runOnMachineFunction() local [all …]
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| D | WebAssemblyExplicitLocals.cpp | 280 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local 282 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg) in runOnMachineFunction() 284 MI.getOperand(2).setReg(NewReg); in runOnMachineFunction() 285 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction() 309 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local 315 .addReg(NewReg); in runOnMachineFunction() 328 .addReg(NewReg); in runOnMachineFunction() 333 Def.setReg(NewReg); in runOnMachineFunction() 335 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction() 381 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local [all …]
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| D | WebAssemblyRegStackify.cpp | 532 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in moveForSingleUse() local 533 Def->getOperand(0).setReg(NewReg); in moveForSingleUse() 534 Op.setReg(NewReg); in moveForSingleUse() 537 LIS.createAndComputeVirtRegInterval(NewReg); in moveForSingleUse() 545 MFI.stackifyVReg(MRI, NewReg); in moveForSingleUse() 547 DefDIs.updateReg(NewReg); in moveForSingleUse() 568 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in rematerializeCheapDef() local 569 TII->reMaterialize(MBB, Insert, NewReg, 0, Def, *TRI); in rematerializeCheapDef() 570 Op.setReg(NewReg); in rematerializeCheapDef() 573 LIS.createAndComputeVirtRegInterval(NewReg); in rematerializeCheapDef() [all …]
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| D | WebAssemblyDebugValueManager.cpp | 53 unsigned NewReg) { in clone() argument 59 MO.setReg(NewReg); in clone()
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| D | WebAssemblyDebugValueManager.h | 33 void clone(MachineInstr *Insert, unsigned NewReg);
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| D | CriticalAntiDepBreaker.cpp | 354 unsigned NewReg) { in isNewRegClobberedByRefs() argument 369 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs() 373 CheckOper.getReg() != NewReg) in isNewRegClobberedByRefs() 404 unsigned NewReg = Order[i]; in findSuitableFreeRegister() local 406 if (NewReg == AntiDepReg) continue; in findSuitableFreeRegister() 410 if (NewReg == LastNewReg) continue; in findSuitableFreeRegister() 414 if (isNewRegClobberedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue; in findSuitableFreeRegister() 419 assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) in findSuitableFreeRegister() 421 if (KillIndices[NewReg] != ~0u || in findSuitableFreeRegister() 422 Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) || in findSuitableFreeRegister() [all …]
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| D | AggressiveAntiDepBreaker.cpp | 654 unsigned NewReg = 0; in FindSuitableFreeRegisters() local 656 NewReg = NewSuperReg; in FindSuitableFreeRegisters() 660 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters() 663 LLVM_DEBUG(dbgs() << " " << printReg(NewReg, TRI)); in FindSuitableFreeRegisters() 666 if (!RenameRegisterMap[Reg].test(NewReg)) { in FindSuitableFreeRegisters() 675 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) { in FindSuitableFreeRegisters() 680 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters() 698 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, false, true, TRI); in FindSuitableFreeRegisters() 716 if (DefMI->readsRegister(NewReg, TRI)) { in FindSuitableFreeRegisters() 723 RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg)); in FindSuitableFreeRegisters() [all …]
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| D | MachineCSE.cpp | 617 Register NewReg = CSMI->getOperand(i).getReg(); in ProcessBlockCSE() local 626 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlockCSE() 629 if (OldReg == NewReg) { in ProcessBlockCSE() 635 Register::isVirtualRegister(NewReg) && in ProcessBlockCSE() 638 if (!isProfitableToCSE(NewReg, OldReg, CSMI->getParent(), MI)) { in ProcessBlockCSE() 647 if (!MRI->constrainRegAttrs(NewReg, OldReg)) { in ProcessBlockCSE() 654 CSEPairs.push_back(std::make_pair(OldReg, NewReg)); in ProcessBlockCSE() 662 unsigned NewReg = CSEPair.second; in ProcessBlockCSE() local 664 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlockCSE() 666 Def->clearRegisterDeads(NewReg); in ProcessBlockCSE() [all …]
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| D | ModuloSchedule.cpp | 404 unsigned NewReg = VRMap[PrevStage][LoopVal]; in generateExistingPhis() local 406 InitVal, NewReg); in generateExistingPhis() 419 unsigned NewReg = 0; in generateExistingPhis() local 519 NewReg = PhiOp2; in generateExistingPhis() 526 NewReg = VRMap[ReuseStage - np][LoopVal]; in generateExistingPhis() 529 Def, NewReg); in generateExistingPhis() 531 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis() 532 PhiOp2 = NewReg; in generateExistingPhis() 537 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI, LIS); in generateExistingPhis() 548 NewReg = MRI.createVirtualRegister(RC); in generateExistingPhis() [all …]
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| D | TailDuplicator.cpp | 336 void TailDuplicator::addSSAUpdateEntry(Register OrigReg, Register NewReg, in addSSAUpdateEntry() argument 341 LI->second.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry() 344 Vals.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry() 406 Register NewReg = MRI->createVirtualRegister(RC); in duplicateInstruction() local 407 MO.setReg(NewReg); in duplicateInstruction() 408 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction() 410 addSSAUpdateEntry(Reg, NewReg, PredBB); in duplicateInstruction() 450 Register NewReg = MRI->createVirtualRegister(NewRC); in duplicateInstruction() local 452 TII->get(TargetOpcode::COPY), NewReg) in duplicateInstruction() 455 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction() [all …]
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| D | PeepholeOptimizer.cpp | 845 virtual bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) = 0; 873 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument 877 MOSrc.setReg(NewReg); in RewriteCurrentSource() 918 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument 962 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument 967 MO.setReg(NewReg); in RewriteCurrentSource() 1009 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument 1014 CopyLike.getOperand(CurrentSrcIdx).setReg(NewReg); in RewriteCurrentSource() 1087 bool RewriteCurrentSource(Register NewReg, unsigned NewSubReg) override { in RewriteCurrentSource() argument 1094 MO.setReg(NewReg); in RewriteCurrentSource()
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| D | CriticalAntiDepBreaker.h | 101 unsigned NewReg);
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| D | TwoAddressInstructionPass.cpp | 643 Register NewReg; in scanUses() local 646 NewReg, IsDstPhys)) { in scanUses() 656 VirtRegPairs.push_back(NewReg); in scanUses() 659 bool isNew = SrcRegMap.insert(std::make_pair(NewReg, Reg)).second; in scanUses() 661 assert(SrcRegMap[NewReg] == Reg && "Can't map to two src registers!"); in scanUses() 662 VirtRegPairs.push_back(NewReg); in scanUses() 663 Reg = NewReg; in scanUses()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | AntiDepBreaker.h | 60 void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) { in UpdateDbgValue() argument 64 MI.getDebugOperand(0).setReg(NewReg); in UpdateDbgValue() 68 MI.getOperand(0).setReg(NewReg); in UpdateDbgValue() 77 unsigned OldReg, unsigned NewReg) { in UpdateDbgValues() argument 85 UpdateDbgValue(*DbgMI, OldReg, NewReg); in UpdateDbgValues()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIOptimizeVGPRLiveRange.cpp | 125 Register Reg, Register NewReg, MachineBasicBlock *Flow, 442 Register Reg, Register NewReg, MachineBasicBlock *Flow, in updateLiveRangeInElseRegion() argument 445 LiveVariables::VarInfo &NewVarInfo = LV->getVarInfo(NewReg); in updateLiveRangeInElseRegion() 479 Register NewReg = MRI->createVirtualRegister(RC); in optimizeLiveRange() local 482 TII->get(TargetOpcode::PHI), NewReg); in optimizeLiveRange() 498 O.setReg(NewReg); in optimizeLiveRange() 504 O.setReg(NewReg); in optimizeLiveRange() 511 updateLiveRangeInElseRegion(Reg, NewReg, Flow, Endif, ElseBlocks); in optimizeLiveRange() 520 Register NewReg = MRI->createVirtualRegister(RC); in optimizeWaterfallLiveRange() local 530 O.setReg(NewReg); in optimizeWaterfallLiveRange() [all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64DeadRegisterDefinitionsPass.cpp | 161 unsigned NewReg; in processMachineBasicBlock() local 166 NewReg = AArch64::WZR; in processMachineBasicBlock() 168 NewReg = AArch64::XZR; in processMachineBasicBlock() 174 MO.setReg(NewReg); in processMachineBasicBlock()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | Localizer.cpp | 134 Register NewReg = MRI->createGenericVirtualRegister(MRI->getType(Reg)); in localizeInterBlock() local 135 MRI->setRegClassOrRegBank(NewReg, MRI->getRegClassOrRegBank(Reg)); in localizeInterBlock() 136 LocalizedMI->getOperand(0).setReg(NewReg); in localizeInterBlock() 138 MBBWithLocalDef.insert(std::make_pair(MBBAndReg, NewReg)).first; in localizeInterBlock()
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| D | RegisterBankInfo.cpp | 468 Register NewReg = *NewRegs.begin(); in applyDefaultMapping() local 470 MO.setReg(NewReg); in applyDefaultMapping() 471 LLVM_DEBUG(dbgs() << " with " << printReg(NewReg, nullptr)); in applyDefaultMapping() 476 LLT NewTy = MRI.getType(NewReg); in applyDefaultMapping() 487 MRI.setType(NewReg, OrigTy); in applyDefaultMapping()
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| D | CallLowering.cpp | 1097 Register NewReg = MRI.createGenericVirtualRegister(LocTy); in extendRegister() local 1098 MIRBuilder.buildSExt(NewReg, ValReg); in extendRegister() 1099 return NewReg; in extendRegister() 1102 Register NewReg = MRI.createGenericVirtualRegister(LocTy); in extendRegister() local 1103 MIRBuilder.buildZExt(NewReg, ValReg); in extendRegister() 1104 return NewReg; in extendRegister()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| D | A15SDOptimizer.cpp | 629 unsigned NewReg = optimizeSDPattern(MI); in runOnInstruction() local 631 if (NewReg != 0) { in runOnInstruction() 640 MRI->constrainRegClass(NewReg, MRI->getRegClass((*I)->getReg())); in runOnInstruction() 643 << printReg(NewReg) << "\n"); in runOnInstruction() 644 (*I)->substVirtReg(NewReg, 0, *TRI); in runOnInstruction() 647 Replacements[MI] = NewReg; in runOnInstruction()
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| D | ARMBaseRegisterInfo.cpp | 378 void ARMBaseRegisterInfo::updateRegAllocHint(Register Reg, Register NewReg, in updateRegAllocHint() argument 392 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg); in updateRegAllocHint() 393 if (Register::isVirtualRegister(NewReg)) in updateRegAllocHint() 394 MRI->setRegAllocationHint(NewReg, in updateRegAllocHint()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgEntityHistoryCalculator.cpp | 396 Register NewReg = Op.getReg(); in handleNewDebugValue() local 397 if (!TrackedRegs.count(NewReg)) in handleNewDebugValue() 398 addRegDescribedVar(RegVars, NewReg, Var); in handleNewDebugValue() 400 TrackedRegs[NewReg] = true; in handleNewDebugValue()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 299 unsigned NewReg, int64_t AddrDispShift); 580 unsigned NewReg, in replaceDebugValue() argument 612 auto replaceOldReg = [OldReg, NewReg](const MachineOperand &Op) { in replaceDebugValue() 614 return MachineOperand::CreateReg(NewReg, false, false, false, false, in replaceDebugValue()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | RDFCopy.cpp | 179 unsigned NewReg = MinPhysReg(SR); in run() local 180 Op.setReg(NewReg); in run()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| D | VarLocBasedImpl.cpp | 489 Register NewReg) { in CreateEntryCopyBackupLoc() 495 VL.Locs[0].Value.RegNo = NewReg; in CreateEntryCopyBackupLoc() 502 Register NewReg) { in CreateCopyLoc() 507 VL.Locs[I].Value.RegNo = NewReg; in CreateCopyLoc() 974 Register NewReg = Register()); 1393 const VarLoc::MachineLoc &OldLoc, Register NewReg) { in insertTransferDebugPair() argument 1414 assert(NewReg && in insertTransferDebugPair() 1418 VarLoc VL = VarLoc::CreateCopyLoc(OldVarLoc, OldLoc, NewReg); in insertTransferDebugPair() 1440 assert(NewReg && in insertTransferDebugPair() 1444 VarLoc VL = VarLoc::CreateCopyLoc(OldVarLoc, OldLoc, NewReg); in insertTransferDebugPair()
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