Searched refs:NewDest (Results 1 – 10 of 10) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.h | 36 MachineBasicBlock *NewDest) const override;
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| D | Thumb2InstrInfo.cpp | 63 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
67 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
81 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
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| D | ARMConstantIslandPass.cpp | 1723 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB(); in fixupConditionalBr() local
1724 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1729 MI->getOperand(0).setMBB(NewDest); in fixupConditionalBr()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| D | BranchFolding.h | 143 MachineBasicBlock &NewDest);
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| D | TargetInstrInfo.cpp | 142 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
162 if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest)) in ReplaceTailWithBranchTo()
163 insertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL); in ReplaceTailWithBranchTo()
164 MBB->addSuccessor(NewDest); in ReplaceTailWithBranchTo()
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| D | BranchFolding.cpp | 355 MachineBasicBlock &NewDest) { in replaceTailWithBranchTo() argument
371 for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) { in replaceTailWithBranchTo()
384 TII->ReplaceTailWithBranchTo(OldInst, &NewDest); in replaceTailWithBranchTo()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 6281 Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarXnor() local
6285 BuildMI(MBB, MII, DL, get(AMDGPU::V_XNOR_B32_e64), NewDest) in lowerScalarXnor()
6289 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
6290 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
6302 Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in lowerScalarXnor() local
6309 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
6314 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
6322 BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest).addReg(Temp); in lowerScalarXnor()
6326 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
6330 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
[all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsConstantIslandPass.cpp | 1580 MachineBasicBlock *NewDest = in fixupConditionalBr() local
1582 if (isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1588 MI->getOperand(TargetOperand).setMBB(NewDest); in fixupConditionalBr()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 780 MachineBasicBlock *NewDest) const;
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
| D | Instructions.h | 4631 void setUnwindDest(BasicBlock *NewDest) {
4632 assert(NewDest);
4634 Op<1>() = NewDest;
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