Searched refs:MaskHi (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1748 SDValue MaskLo, MaskHi; in SplitVecRes_MLOAD() local
1750 SplitVecRes_SETCC(Mask.getNode(), MaskLo, MaskHi); in SplitVecRes_MLOAD()
1753 GetSplitVector(Mask, MaskLo, MaskHi); in SplitVecRes_MLOAD()
1755 std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl); in SplitVecRes_MLOAD()
1800 Hi = DAG.getMaskedLoad(HiVT, dl, Ch, Ptr, Offset, MaskHi, PassThruHi, in SplitVecRes_MLOAD()
1833 SDValue MaskLo, MaskHi; in SplitVecRes_MGATHER() local
1835 SplitVecRes_SETCC(Mask.getNode(), MaskLo, MaskHi); in SplitVecRes_MGATHER()
1838 GetSplitVector(Mask, MaskLo, MaskHi); in SplitVecRes_MGATHER()
1840 std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl); in SplitVecRes_MGATHER()
1868 SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale}; in SplitVecRes_MGATHER()
[all …]
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| D | TargetLowering.cpp | 1853 APInt MaskHi = DemandedBits.getHiBits(HalfBitWidth).trunc(HalfBitWidth); in SimplifyDemandedBits() local
1860 if (SimplifyDemandedBits(Op.getOperand(1), MaskHi, KnownHi, TLO, Depth + 1)) in SimplifyDemandedBits()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 2605 Register MaskHi = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() local
2608 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), MaskHi) in selectG_PTRMASK()
2612 .addReg(MaskHi); in selectG_PTRMASK()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 23363 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local
23364 SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC()
23374 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local
23375 SDValue Result = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC()
23401 static const int MaskHi[] = { 1, 1, 3, 3 }; in LowerVSETCC() local
23403 SDValue EQHi = DAG.getVectorShuffle(MVT::v4i32, dl, EQ, EQ, MaskHi); in LowerVSETCC()
23405 SDValue GTHi = DAG.getVectorShuffle(MVT::v4i32, dl, GT, GT, MaskHi); in LowerVSETCC()
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