Searched refs:MISC_REG_CPMU_LP_FW_ENABLE_P0 (Results 1 – 2 of 2) sorted by relevance
412 #define MISC_REG_CPMU_LP_FW_ENABLE_P0 \ macro
3788 REG_WR(sc, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), 0); in elink_eee_disable()7544 REG_WR(sc, MISC_REG_CPMU_LP_FW_ENABLE_P0 + (params->port << 2), in elink_update_link_down()7595 REG_WR(sc, MISC_REG_CPMU_LP_FW_ENABLE_P0 + in elink_update_link_up()