| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86LegalizerInfo.cpp | 117 LegacyInfo.setAction({G_IMPLICIT_DEF, Ty}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
120 LegacyInfo.setAction({G_PHI, Ty}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
124 LegacyInfo.setAction({BinOp, Ty}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
127 LegacyInfo.setAction({Op, s32}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
128 LegacyInfo.setAction({Op, 1, s1}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
133 LegacyInfo.setAction({MemOp, Ty}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
136 LegacyInfo.setAction({MemOp, 1, p0}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
140 LegacyInfo.setAction({G_FRAME_INDEX, p0}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
141 LegacyInfo.setAction({G_GLOBAL_VALUE, p0}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
143 LegacyInfo.setAction({G_PTR_ADD, p0}, LegacyLegalizeActions::Legal); in setLegalizerInfo32bit()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegacyLegalizerInfo.cpp | 30 case Legal: in operator <<()
71 setScalarAction(TargetOpcode::G_ANYEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
72 setScalarAction(TargetOpcode::G_ZEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
73 setScalarAction(TargetOpcode::G_SEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
74 setScalarAction(TargetOpcode::G_TRUNC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
75 setScalarAction(TargetOpcode::G_TRUNC, 1, {{1, Legal}}); in LegacyLegalizerInfo()
77 setScalarAction(TargetOpcode::G_INTRINSIC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
78 setScalarAction(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS, 0, {{1, Legal}}); in LegacyLegalizerInfo()
161 ElementSizesSeen.push_back({ElementSize, Legal}); in computeTables()
256 case Legal: in findAction()
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| D | LegalizerInfo.cpp | 42 case Legal: in operator <<()
103 case Legal: in hasNoSimpleLoops()
121 if (Rule.getAction() == Custom || Rule.getAction() == Legal) in mutationIsSane()
363 return getAction(MI, MRI).Action == Legal; in isLegal()
371 return Action == Legal || Action == Custom; in isLegalOrCustom()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 95 setOperationAction(ISD::ADD, VecTys[i], Legal); in MipsSETargetLowering()
96 setOperationAction(ISD::SUB, VecTys[i], Legal); in MipsSETargetLowering()
97 setOperationAction(ISD::LOAD, VecTys[i], Legal); in MipsSETargetLowering()
98 setOperationAction(ISD::STORE, VecTys[i], Legal); in MipsSETargetLowering()
99 setOperationAction(ISD::BITCAST, VecTys[i], Legal); in MipsSETargetLowering()
109 setOperationAction(ISD::ADDC, MVT::i32, Legal); in MipsSETargetLowering()
110 setOperationAction(ISD::ADDE, MVT::i32, Legal); in MipsSETargetLowering()
115 setOperationAction(ISD::MUL, MVT::v2i16, Legal); in MipsSETargetLowering()
189 setOperationAction(ISD::MUL, MVT::i64, Legal); in MipsSETargetLowering()
232 setOperationAction(ISD::MUL, MVT::i32, Legal); in MipsSETargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 93 setOperationAction(ISD::ADD, MVT::i32, Legal); in ARCTargetLowering()
94 setOperationAction(ISD::SUB, MVT::i32, Legal); in ARCTargetLowering()
95 setOperationAction(ISD::AND, MVT::i32, Legal); in ARCTargetLowering()
96 setOperationAction(ISD::SMAX, MVT::i32, Legal); in ARCTargetLowering()
97 setOperationAction(ISD::SMIN, MVT::i32, Legal); in ARCTargetLowering()
100 setOperationAction(ISD::SHL, MVT::i32, Legal); in ARCTargetLowering()
101 setOperationAction(ISD::SRA, MVT::i32, Legal); in ARCTargetLowering()
102 setOperationAction(ISD::SRL, MVT::i32, Legal); in ARCTargetLowering()
103 setOperationAction(ISD::ROTR, MVT::i32, Legal); in ARCTargetLowering()
105 setOperationAction(ISD::Constant, MVT::i32, Legal); in ARCTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| D | VPRecipeBuilder.h | 35 LoopVectorizationLegality *Legal; variable
109 LoopVectorizationLegality *Legal, in VPRecipeBuilder() argument
112 : OrigLoop(OrigLoop), TLI(TLI), Legal(Legal), CM(CM), PSE(PSE), in VPRecipeBuilder()
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| D | LoopVectorize.cpp | 458 Builder(PSE.getSE()->getContext()), Legal(LVL), Cost(CM), BFI(BFI), in InnerLoopVectorizer()
848 LoopVectorizationLegality *Legal; member in llvm::InnerLoopVectorizer
1232 LoopVectorizationLegality *Legal, in LoopVectorizationCostModel() argument
1239 : ScalarEpilogueStatus(SEL), TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), in LoopVectorizationCostModel()
1472 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy)) in isOptimizableIVTruncate()
1476 return Legal->isInductionPhi(Op); in isOptimizableIVTruncate()
1498 return Legal->isConsecutivePtr(Ptr) && in isLegalMaskedStore()
1505 return Legal->isConsecutivePtr(Ptr) && in isLegalMaskedLoad()
1525 return (all_of(Legal->getReductionVars(), [&](auto &Reduction) -> bool { in canVectorizeReductions()
1547 return Legal->isMaskRequired(I); in isPredicatedInst()
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| D | LoopVectorizationPlanner.h | 250 LoopVectorizationLegality *Legal; variable
280 LoopVectorizationLegality *Legal, in LoopVectorizationPlanner() argument
287 : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM), IAI(IAI), in LoopVectorizationPlanner()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 167 setOperationAction(ISD::ABS, VT, Legal); in SystemZTargetLowering()
223 setOperationAction(ISD::STRICT_FP_TO_SINT, VT, Legal); in SystemZTargetLowering()
225 setOperationAction(ISD::STRICT_FP_TO_UINT, VT, Legal); in SystemZTargetLowering()
228 setOperationAction(ISD::STRICT_SINT_TO_FP, VT, Legal); in SystemZTargetLowering()
230 setOperationAction(ISD::STRICT_UINT_TO_FP, VT, Legal); in SystemZTargetLowering()
263 setOperationAction(ISD::TRAP, MVT::Other, Legal); in SystemZTargetLowering()
277 setOperationAction(ISD::CTLZ, MVT::i64, Legal); in SystemZTargetLowering()
282 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in SystemZTargetLowering()
327 if (getOperationAction(Opcode, VT) == Legal) in SystemZTargetLowering()
343 setOperationAction(ISD::LOAD, VT, Legal); in SystemZTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | LegalizerInfo.h | 49 Legal, enumerator
149 case LegacyLegalizeActions::Legal: in LegalizeActionStep()
150 Action = LegalizeActions::Legal; in LegalizeActionStep()
559 return actionIf(LegalizeAction::Legal, Predicate); in legalIf()
563 return actionFor(LegalizeAction::Legal, Types); in legalFor()
568 return actionFor(LegalizeAction::Legal, Types); in legalFor()
574 return actionForTypeWithAnyImm(LegalizeAction::Legal, Types); in legalForTypeWithAnyImm()
580 return actionForTypeWithAnyImm(LegalizeAction::Legal, Types); in legalForTypeWithAnyImm()
588 return actionIf(LegalizeAction::Legal, in legalForTypesWithMemDesc()
595 return actionForCartesianProduct(LegalizeAction::Legal, Types); in legalForCartesianProduct()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 170 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in PPCTargetLowering()
171 setOperationAction(ISD::BITREVERSE, MVT::i64, Legal); in PPCTargetLowering()
187 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Legal); in PPCTargetLowering()
188 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Legal); in PPCTargetLowering()
189 setTruncStoreAction(MVT::f64, MVT::f16, Legal); in PPCTargetLowering()
190 setTruncStoreAction(MVT::f32, MVT::f16, Legal); in PPCTargetLowering()
206 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
207 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
208 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
209 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/VE/ |
| D | VETargetTransformInfo.h | 72 return VPLegalization(VPLegalization::Legal, VPLegalization::Legal); in getVPLegalizationStrategy()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| D | ExpandVectorPredication.cpp | 41 VPINTERNAL_CASE(Legal) \
398 case VPLegalization::Legal: in expandVectorPredication()
408 Job.Strategy.EVLParamStrategy = VPLegalization::Legal; in expandVectorPredication()
412 case VPLegalization::Legal: in expandVectorPredication()
421 Job.Strategy.OpStrategy = VPLegalization::Legal; in expandVectorPredication()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| D | IRSimilarityIdentifier.cpp | 28 : Inst(&I), Legal(Legality), IDL(&IDList) { in IRInstructionData()
87 if (!A.Legal || !B.Legal) in isClose()
165 case InstrType::Legal: in convertToUnsignedVec()
346 if (!A.Legal || !B.Legal) in isSimilar()
598 if (!ItA->Legal || !ItB->Legal) in compareStructure()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1499 setOperationAction(ISD::ConstantFP, MVT::f32, Legal); in HexagonTargetLowering()
1500 setOperationAction(ISD::ConstantFP, MVT::f64, Legal); in HexagonTargetLowering()
1501 setOperationAction(ISD::TRAP, MVT::Other, Legal); in HexagonTargetLowering()
1548 setOperationAction(LegalIntOp, MVT::i32, Legal); in HexagonTargetLowering()
1549 setOperationAction(LegalIntOp, MVT::i64, Legal); in HexagonTargetLowering()
1574 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in HexagonTargetLowering()
1576 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in HexagonTargetLowering()
1577 setOperationAction(ISD::BITREVERSE, MVT::i64, Legal); in HexagonTargetLowering()
1578 setOperationAction(ISD::BSWAP, MVT::i32, Legal); in HexagonTargetLowering()
1579 setOperationAction(ISD::BSWAP, MVT::i64, Legal); in HexagonTargetLowering()
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| D | HexagonISelLoweringHVX.cpp | 81 setOperationAction(ISD::VECTOR_SHUFFLE, ByteV, Legal); in initializeHVXLowering()
82 setOperationAction(ISD::VECTOR_SHUFFLE, ByteW, Legal); in initializeHVXLowering()
86 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
87 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
89 setOperationAction(ISD::AND, T, Legal); in initializeHVXLowering()
90 setOperationAction(ISD::OR, T, Legal); in initializeHVXLowering()
91 setOperationAction(ISD::XOR, T, Legal); in initializeHVXLowering()
92 setOperationAction(ISD::ADD, T, Legal); in initializeHVXLowering()
93 setOperationAction(ISD::SUB, T, Legal); in initializeHVXLowering()
94 setOperationAction(ISD::MUL, T, Legal); in initializeHVXLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| D | IRSimilarityIdentifier.h | 75 enum InstrType { Legal, Illegal, Invisible }; enumerator
123 bool Legal; member
413 return Legal; in visitCallInst()
421 InstrType visitInstruction(Instruction &I) { return Legal; } in visitInstruction()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVTargetTransformInfo.h | 148 return VPLegalization(VPLegalization::Legal, VPLegalization::Legal); in getVPLegalizationStrategy()
|
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 370 setOperationAction(ISD::SINT_TO_FP, MVT::f16, Legal); in NVPTXTargetLowering()
371 setOperationAction(ISD::FP_TO_SINT, MVT::f16, Legal); in NVPTXTargetLowering()
377 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
378 setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand); in NVPTXTargetLowering()
389 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Legal); in NVPTXTargetLowering()
390 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Legal); in NVPTXTargetLowering()
391 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Legal); in NVPTXTargetLowering()
392 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); in NVPTXTargetLowering()
402 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in NVPTXTargetLowering()
403 setOperationAction(ISD::BITREVERSE, MVT::i64, Legal); in NVPTXTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 196 Legal, // The target natively supports this operation. enumerator
1069 if (Action != Legal) in getFixedPointOperationAction()
1119 (getOperationAction(Op, VT) == Legal ||
1133 (getOperationAction(Op, VT) == Legal ||
1147 (getOperationAction(Op, VT) == Legal ||
1219 getOperationAction(Op, VT) == Legal; in isOperationLegal()
1238 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1244 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1263 return isTypeLegal(ValVT) && getTruncStoreAction(ValVT, MemVT) == Legal; in isTruncStoreLegal()
1270 (getTruncStoreAction(ValVT, MemVT) == Legal || in isTruncStoreLegalOrCustom()
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| /freebsd-12-stable/contrib/netbsd-tests/lib/libc/db/ |
| D | README | 14 Legal command characters are as follows:
39 Legal key/data characters are as follows:
|
| /freebsd-12-stable/lib/libc/db/test/ |
| D | README | 22 Legal command characters are as follows:
47 Legal key/data characters are as follows:
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 113 setOperationAction(ISD::ConstantFP, T, Legal); in WebAssemblyTargetLowering()
126 setOperationAction(Op, T, Legal); in WebAssemblyTargetLowering()
128 setOperationAction(ISD::FMINIMUM, T, Legal); in WebAssemblyTargetLowering()
129 setOperationAction(ISD::FMAXIMUM, T, Legal); in WebAssemblyTargetLowering()
180 setOperationAction(Op, T, Legal); in WebAssemblyTargetLowering()
184 setOperationAction(ISD::ABS, T, Legal); in WebAssemblyTargetLowering()
224 setOperationAction(Op, T, Legal); in WebAssemblyTargetLowering()
227 setOperationAction(ISD::CTPOP, MVT::v16i8, Legal); in WebAssemblyTargetLowering()
302 setLoadExtAction(Ext, MVT::v8i16, MVT::v8i8, Legal); in WebAssemblyTargetLowering()
303 setLoadExtAction(Ext, MVT::v4i32, MVT::v4i16, Legal); in WebAssemblyTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 266 case TargetLowering::Legal: in LegalizeOp()
297 case TargetLowering::Legal: in LegalizeOp()
327 TargetLowering::LegalizeAction Action = TargetLowering::Legal; in LegalizeOp()
336 if (Action == TargetLowering::Legal) in LegalizeOp()
354 TargetLowering::Legal) { in LegalizeOp()
359 == TargetLowering::Legal) in LegalizeOp()
360 Action = TargetLowering::Legal; in LegalizeOp()
503 if (Action == TargetLowering::Legal) in LegalizeOp()
519 case TargetLowering::Legal: in LegalizeOp()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 69 setOperationAction(ISD::ADDC, VT, Legal); in AVRTargetLowering()
70 setOperationAction(ISD::SUBC, VT, Legal); in AVRTargetLowering()
71 setOperationAction(ISD::ADDE, VT, Legal); in AVRTargetLowering()
72 setOperationAction(ISD::SUBE, VT, Legal); in AVRTargetLowering()
117 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
118 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
119 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
120 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
121 setIndexedStoreAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
122 setIndexedStoreAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
[all …]
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