Searched refs:LRINT (Results 1 – 13 of 13) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 81 DAG_FUNCTION(lrint, 1, 1, experimental_constrained_lrint, LRINT)
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 888 LRINT, enumerator
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 368 case ISD::LRINT: return "lrint"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 838 case ISD::LRINT: Res = SoftenFloatOp_LRINT(N); break; in SoftenFloatOperand()
1782 case ISD::LRINT: Res = ExpandFloatOp_LRINT(N); break; in ExpandFloatOperand()
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| D | LegalizeDAG.cpp | 1008 case ISD::LRINT: in LegalizeOp()
4084 case ISD::LRINT: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 6286 case Intrinsic::lrint: Opcode = ISD::LRINT; break; in visitIntrinsicCall()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 503 case Intrinsic::lrint: Opcode = ISD::LRINT; break; in mightUseCTR()
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| D | PPCISelLowering.cpp | 516 setOperationAction(ISD::LRINT, MVT::f64, Legal); in PPCTargetLowering()
517 setOperationAction(ISD::LRINT, MVT::f32, Legal); in PPCTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 903 setOperationAction(ISD::LRINT, VT, Expand); in initActions()
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| /freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 495 def lrint : SDNode<"ISD::LRINT" , SDTFPToIntOp>;
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 317 setOperationAction(ISD::LRINT, MVT::f16, Legal); in RISCVTargetLowering()
333 setOperationAction(ISD::LRINT, MVT::f32, Legal); in RISCVTargetLowering()
354 setOperationAction(ISD::LRINT, MVT::f64, Legal); in RISCVTargetLowering()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 287 setOperationAction(ISD::LRINT, MVT::f32, Custom); in X86TargetLowering()
288 setOperationAction(ISD::LRINT, MVT::f64, Custom); in X86TargetLowering()
293 setOperationAction(ISD::LRINT, MVT::i64, Custom); in X86TargetLowering()
713 setOperationAction(ISD::LRINT, MVT::f80, Custom); in X86TargetLowering()
30502 case ISD::LRINT: in LowerOperation()
31051 case ISD::LRINT: in ReplaceNodeResults()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 704 setOperationAction(ISD::LRINT, Ty, Legal); in AArch64TargetLowering()
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