Searched refs:In1 (Results 1 – 4 of 4) sorted by relevance
| /freebsd-12-stable/sys/gnu/dts/arm/ |
| D | imx6dl-eckelmann-ci4x10.dts | 140 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x00000000 /* In1 */
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 40 static bool addWithOverflow(APInt &Result, const APInt &In1, in addWithOverflow() argument
44 Result = In1.sadd_ov(In2, Overflow); in addWithOverflow()
46 Result = In1.uadd_ov(In2, Overflow); in addWithOverflow()
53 static bool subWithOverflow(APInt &Result, const APInt &In1, in subWithOverflow() argument
57 Result = In1.ssub_ov(In2, Overflow); in subWithOverflow()
59 Result = In1.usub_ov(In2, Overflow); in subWithOverflow()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 49859 SDValue In0, In1; in matchPMADDWD_2() local
49898 In1 = N01In; in matchPMADDWD_2()
49903 In1.getValueSizeInBits() < VT.getSizeInBits()) in matchPMADDWD_2()
49912 if (In0 != N00In || In1 != N01In || In0 != N10In || In1 != N11In) in matchPMADDWD_2()
49935 if (OutVT16.bitsLT(In1.getValueType())) { in matchPMADDWD_2()
49936 In1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, OutVT16, In1, in matchPMADDWD_2()
49939 return SplitOpsAndApply(DAG, Subtarget, DL, VT, { In0, In1 }, in matchPMADDWD_2()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 6996 SDValue In1 = Op.getOperand(0); in LowerFCOPYSIGN() local
7012 DAG.getUNDEF(VecVT), In1); in LowerFCOPYSIGN()
7016 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); in LowerFCOPYSIGN()
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