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Searched refs:IS_VALLEYVIEW (Results 1 – 11 of 11) sorted by relevance

/freebsd-12-stable/sys/dev/drm2/i915/
Dintel_dp.c275 if (IS_VALLEYVIEW(dev)) in intel_hrawclk()
384 else if (IS_VALLEYVIEW(dev)) in intel_dp_aux_ch()
824 } else if (IS_VALLEYVIEW(dev)) { in intel_dp_set_m_n()
910 if (is_cpu_edp(intel_dp) && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) { in intel_dp_mode_set()
1491 } else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) { in intel_dp_pre_emphasis_max()
1824 } else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) { in intel_dp_start_link_train()
1914 } else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) { in intel_dp_complete_link_train()
2744 if (IS_VALLEYVIEW(dev) && port == PORT_C) { in intel_dp_init_connector()
Dintel_crt.c348 if (IS_VALLEYVIEW(dev)) in intel_crt_detect_hotplug()
768 else if (IS_VALLEYVIEW(dev)) in intel_crt_init()
Di915_gem_tiling.c97 if (IS_VALLEYVIEW(dev)) { in i915_gem_detect_bit_6_swizzle()
Di915_drv.c1365 } else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
1393 if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
Di915_irq.c97 if (IS_VALLEYVIEW(dev)) in intel_enable_asle()
1250 else if (IS_VALLEYVIEW(dev)) in i915_capture_error_state()
1260 if (IS_VALLEYVIEW(dev)) in i915_capture_error_state()
2715 if (IS_VALLEYVIEW(dev)) { in intel_irq_init()
Dintel_pm.c3454 } else if (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev)) { in intel_disable_gt_powersave()
3481 } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) { in intel_enable_gt_powersave()
4200 } else if (IS_VALLEYVIEW(dev)) { in intel_init_pm()
4433 if (IS_VALLEYVIEW(dev)) { in intel_gt_reset()
4450 if (IS_VALLEYVIEW(dev)) { in intel_gt_init()
Di915_drv.h1181 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) macro
1206 #define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev))
Dintel_sprite.c705 if (IS_HASWELL(dev) || IS_VALLEYVIEW(dev)) in intel_plane_init()
Di915_debug.c407 if (IS_VALLEYVIEW(dev)) { in i915_interrupt_info()
1424 if (!IS_VALLEYVIEW(dev)) { in i915_dpio_info()
Dintel_display.c582 } else if (IS_VALLEYVIEW(dev)) { in intel_limit()
1449 BUG_ON(!IS_VALLEYVIEW(dev_priv->dev) && dev_priv->info->gen >= 5); in intel_enable_pll()
4239 if (IS_VALLEYVIEW(dev)) { in i9xx_get_refclk()
4770 else if (IS_VALLEYVIEW(dev)) in i9xx_crtc_mode_set()
4814 if (IS_VALLEYVIEW(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) { in i9xx_crtc_mode_set()
8511 } else if (IS_VALLEYVIEW(dev)) { in intel_setup_outputs()
8747 if (IS_VALLEYVIEW(dev)) in intel_init_display()
9400 if (IS_VALLEYVIEW(dev)) in intel_modeset_cleanup()
Dintel_hdmi.c1003 } else if (IS_VALLEYVIEW(dev)) { in intel_hdmi_init_connector()