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Searched refs:HalfTy (Results 1 – 25 of 26) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/clang/lib/CodeGen/
DCodeGenTypeCache.h39 llvm::Type *HalfTy, *BFloatTy, *FloatTy, *DoubleTy; member
DCGBuiltin.cpp5375 return llvm::FixedVectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad)); in GetNeonType()
5401 return llvm::FixedVectorType::get(CGF->HalfTy, (4 << IsQuad)); in GetFloatNeonType()
6539 Ty = HalfTy; in EmitCommonNeonBuiltinExpr()
7061 llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); in EmitCommonNeonBuiltinExpr()
7068 llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); in EmitCommonNeonBuiltinExpr()
7075 llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); in EmitCommonNeonBuiltinExpr()
7082 llvm::FixedVectorType::get(HalfTy, Ty->getPrimitiveSizeInBits() / 16); in EmitCommonNeonBuiltinExpr()
9828 return EmitNeonCall(CGM.getIntrinsic(Intrinsic::fabs, HalfTy), Ops, "vabs"); in EmitAArch64BuiltinExpr()
9874 llvm::Type *FTy = HalfTy; in EmitAArch64BuiltinExpr()
9899 llvm::Type* FTy = HalfTy; in EmitAArch64BuiltinExpr()
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DItaniumCXXABI.cpp4207 getContext().UnsignedInt128Ty, getContext().HalfTy, in EmitFundamentalRTTIDescriptors()
DCodeGenModule.cpp115 HalfTy = llvm::Type::getHalfTy(LLVMContext); in CodeGenModule()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPURegisterBankInfo.h126 LLT HalfTy,
DAMDGPURegisterBankInfo.cpp648 LLT HalfTy, in split64BitValueForMapping() argument
650 assert(HalfTy.getSizeInBits() == 32); in split64BitValueForMapping()
652 Register LoLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
653 Register HiLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
2260 LLT HalfTy = getHalfSizedType(DstTy); in applyMappingImpl() local
2273 split64BitValueForMapping(B, Src1Regs, HalfTy, MI.getOperand(2).getReg()); in applyMappingImpl()
2275 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
2279 split64BitValueForMapping(B, Src2Regs, HalfTy, MI.getOperand(3).getReg()); in applyMappingImpl()
2281 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
2283 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
DLegalizerHelper.cpp4703 const LLT HalfTy, const LLT AmtTy) { in narrowScalarShiftByConstant() argument
4705 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
4706 Register InH = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
4715 LLT NVT = HalfTy; in narrowScalarShiftByConstant()
4716 unsigned NVTBits = HalfTy.getSizeInBits(); in narrowScalarShiftByConstant()
4815 const LLT HalfTy = LLT::scalar(NewBitSize); in narrowScalarShift() local
4821 MI, KShiftAmt->getOperand(1).getCImm()->getValue(), HalfTy, ShiftAmtTy); in narrowScalarShift()
4829 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift()
4830 Register InH = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift()
4844 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
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DCombinerHelper.cpp2261 LLT HalfTy = LLT::scalar(HalfSize); in applyCombineShiftToUnmerge() local
2264 auto Unmerge = Builder.buildUnmerge(HalfTy, SrcReg); in applyCombineShiftToUnmerge()
2276 Narrowed = Builder.buildLShr(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
2277 Builder.buildConstant(HalfTy, NarrowShiftAmt)).getReg(0); in applyCombineShiftToUnmerge()
2280 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
2289 Narrowed = Builder.buildShl(HalfTy, Narrowed, in applyCombineShiftToUnmerge()
2290 Builder.buildConstant(HalfTy, NarrowShiftAmt)).getReg(0); in applyCombineShiftToUnmerge()
2293 auto Zero = Builder.buildConstant(HalfTy, 0); in applyCombineShiftToUnmerge()
2298 HalfTy, Unmerge.getReg(1), in applyCombineShiftToUnmerge()
2299 Builder.buildConstant(HalfTy, HalfSize - 1)); in applyCombineShiftToUnmerge()
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/IR/
DLLVMContextImpl.cpp33 HalfTy(C, Type::HalfTyID), BFloatTy(C, Type::BFloatTyID), in LLVMContextImpl()
DType.cpp188 Type *Type::getHalfTy(LLVMContext &C) { return &C.pImpl->HalfTy; } in getHalfTy()
DLLVMContextImpl.h1429 Type VoidTy, LabelTy, HalfTy, BFloatTy, FloatTy, DoubleTy, MetadataTy,
/freebsd-12-stable/contrib/llvm-project/clang/include/clang/AST/
DBuiltinTypes.def201 FLOATING_TYPE(Half, HalfTy)
213 FLOATING_TYPE(Float16, HalfTy)
DASTContext.h1069 CanQualType HalfTy; // [OpenCL 6.1.1.1], ARM NEON variable
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp336 MVT HalfTy = MVT::getVectorVT(VecTy.getVectorElementType(), NumElem/2); in typeSplit() local
337 return { HalfTy, HalfTy }; in typeSplit()
1318 MVT HalfTy = typeSplit(VecTy).first; in LowerHvxConcatVectors() local
1319 SDValue V0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfTy, in LowerHvxConcatVectors()
1321 SDValue V1 = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfTy, in LowerHvxConcatVectors()
1795 MVT HalfTy = typeSplit(ResTy).first; in SplitHvxPairOp() local
1796 SDValue L = DAG.getNode(Op.getOpcode(), dl, HalfTy, OpsL); in SplitHvxPairOp()
1797 SDValue H = DAG.getNode(Op.getOpcode(), dl, HalfTy, OpsH); in SplitHvxPairOp()
DHexagonISelDAGToDAGHVX.cpp1079 MVT HalfTy = MVT::getVectorVT(OpTy.getVectorElementType(), in materialize() local
1083 Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op); in materialize()
1358 MVT HalfTy = getSingleVT(MVT::i8); in packp() local
1361 OpRef Out[2] = { OpRef::undef(HalfTy), OpRef::undef(HalfTy) }; in packp()
DHexagonISelLowering.cpp2526 MVT HalfTy = MVT::getVectorVT(ElemTy, Num/2); in buildVector64() local
2529 : buildVector32(Elem.take_front(Num/2), dl, HalfTy, DAG); in buildVector64()
2532 : buildVector32(Elem.drop_front(Num/2), dl, HalfTy, DAG); in buildVector64()
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizerHelper.h329 LLT HalfTy, LLT ShiftAmtTy);
/freebsd-12-stable/contrib/llvm-project/clang/lib/AST/
DPrintfFormatString.cpp580 return Ctx.HalfTy; in getScalarArgType()
DASTContext.cpp1478 InitBuiltinType(HalfTy, BuiltinType::Half); in InitBuiltinTypes()
3834 return SVE_ELTTY(HalfTy, 8, 1); in getBuiltinVectorTypeInfo()
3836 return SVE_ELTTY(HalfTy, 8, 2); in getBuiltinVectorTypeInfo()
3838 return SVE_ELTTY(HalfTy, 8, 3); in getBuiltinVectorTypeInfo()
3840 return SVE_ELTTY(HalfTy, 8, 4); in getBuiltinVectorTypeInfo()
6284 case Float16Rank: return HalfTy; in getFloatingTypeOfSizeWithinDomain()
6286 case HalfRank: return HalfTy; in getFloatingTypeOfSizeWithinDomain()
10416 Type = Context.HalfTy; in DecodeTypeFromStr()
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/TypeSystem/Clang/
DTypeSystemClang.cpp851 if (QualTypeMatchesBitSize(bit_size, ast, ast.HalfTy)) in GetBuiltinTypeForEncodingAndBitSize()
852 return GetType(ast.HalfTy); in GetBuiltinTypeForEncodingAndBitSize()
1019 if (QualTypeMatchesBitSize(bit_size, ast, ast.HalfTy)) in GetBuiltinTypeForDWARFEncodingAndBitSize()
1020 return GetType(ast.HalfTy); in GetBuiltinTypeForDWARFEncodingAndBitSize()
2048 return ast->HalfTy.getAsOpaquePtr(); in GetOpaqueCompilerType()
4643 else if (bit_size == ast.getTypeSize(ast.HalfTy)) in GetFloatTypeSemantics()
4644 return ast.getFloatTypeSemantics(ast.HalfTy); in GetFloatTypeSemantics()
/freebsd-12-stable/contrib/llvm-project/clang/lib/Sema/
DSemaExpr.cpp3853 Ty = Context.HalfTy; in ActOnNumericConstant()
13999 assert((isVector(ResultTy, Context.HalfTy) || in convertHalfVecBinOp()
14002 assert(isVector(LHS.get()->getType(), Context.HalfTy) && in convertHalfVecBinOp()
14003 isVector(RHS.get()->getType(), Context.HalfTy) && in convertHalfVecBinOp()
14065 return VT->getElementType().getCanonicalType() == Ctx.HalfTy; in needsConversionOfHalfVec()
14287 (Opc == BO_Comma || isVector(RHS.get()->getType(), Context.HalfTy) == in CreateBuiltinBinOp()
14288 isVector(LHS.get()->getType(), Context.HalfTy)) && in CreateBuiltinBinOp()
14984 return convertVector(UO, Context.HalfTy, *this); in CreateBuiltinUnaryOp()
DOpenCLBuiltins.td307 def Half : Type<"half", QualType<"Context.HalfTy">>;
DSemaType.cpp1519 case DeclSpec::TST_half: Result = Context.HalfTy; break; in ConvertDeclSpecToType()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp11466 auto *HalfTy = HalfV->getType(); in areExtractShuffleVectors() local
11468 2 * HalfTy->getPrimitiveSizeInBits().getFixedSize(); in areExtractShuffleVectors()
/freebsd-12-stable/contrib/llvm-project/clang/lib/Serialization/
DASTReader.cpp6898 T = Context.HalfTy; in GetType()

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