Home
last modified time | relevance | path

Searched refs:HSYNC (Results 1 – 11 of 11) sorted by relevance

/freebsd-12-stable/sys/gnu/dts/arm/
Dimx53-mba53.dts146 /* VGA_VSYNC, HSYNC with max drive strength */
Dam437x-sbc-t43.dts60 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
Dimx6ul-tx6ul-mainboard.dts205 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
Dimx6ul-tx6ul.dtsi624 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
657 MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x10 /* HSYNC */
Dimx6qdl-kontron-samx6i.dtsi588 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f1 /* HSYNC */
Dam437x-sk-evm.dts382 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
Dam43x-epos-evm.dts443 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
Dat91sam9g45.dtsi540 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
Dam437x-gp-evm.dts309 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
/freebsd-12-stable/sys/dev/drm2/i915/
Dintel_display.c3147 I915_WRITE(TRANS_HSYNC(pipe), I915_READ(HSYNC(pipe))); in ironlake_pch_enable()
3209 I915_WRITE(_TRANS_HSYNC_A, I915_READ(HSYNC(cpu_transcoder))); in lpt_pch_enable()
4660 I915_WRITE(HSYNC(cpu_transcoder), in intel_set_pipe_timings()
6923 int hsync = I915_READ(HSYNC(cpu_transcoder)); in intel_crtc_mode_get()
9522 error->pipe[i].hsync = I915_READ(HSYNC(cpu_transcoder)); in intel_display_capture_error_state()
Di915_reg.h1581 #define HSYNC(trans) _TRANSCODER(trans, _HSYNC_A, _HSYNC_B) macro