Searched refs:G0 (Results 1 – 25 of 36) sorted by relevance
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138 // t<cond> %icc, rs => t<cond> %icc, G0 + rs140 (TICCrr G0, IntRegs:$rs2, condVal)>,148 // t<cond> %xcc, rs => t<cond> %xcc, G0 + rs150 (TXCCrr G0, IntRegs:$rs2, condVal)>,158 // t<cond> rs=> t<cond> %icc, G0 + rs2160 // (TICCrr G0, IntRegs:$rs2, condVal)>,168 // t<cond> %icc, imm => t<cond> %icc, G0 + imm170 (TICCri G0, i32imm:$imm, condVal)>,176 // t<cond> %xcc, imm => t<cond> %xcc, G0 + imm178 (TXCCri G0, i32imm:$imm, condVal)>,[all …]
417 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR()418 && OrMI->getOperand(2).getReg() != SP::G0) in combineRestoreOR()422 && OrMI->getOperand(1).getReg() != SP::G0 in combineRestoreOR()470 RestoreMI->getOperand(1).setReg(SP::G0); in combineRestoreSETHIi()489 && MBBI->getOperand(0).getReg() == SP::G0 in tryCombineRestoreWithPrevInst()490 && MBBI->getOperand(1).getReg() == SP::G0 in tryCombineRestoreWithPrevInst()491 && MBBI->getOperand(2).getReg() == SP::G0); in tryCombineRestoreWithPrevInst()
224 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0) in emitEpilogue()225 .addReg(SP::G0); in emitEpilogue()
67 def : Pat<(i64 simm13:$val), (ORri (i64 G0), (as_i32imm $val))>;290 def : Pat<(store (i64 0), ADDRrr:$dst), (STXrr ADDRrr:$dst, (i64 G0))>;291 def : Pat<(store (i64 0), ADDRri:$dst), (STXri ADDRri:$dst, (i64 G0))>;517 def : Pat<(SPlo tglobaladdr:$in), (ORXri (i64 G0), tglobaladdr:$in)>;519 def : Pat<(SPlo tconstpool:$in), (ORXri (i64 G0), tconstpool:$in)>;523 def : Pat<(SPlo tglobaltlsaddr:$in), (ORXri (i64 G0), tglobaltlsaddr:$in)>;531 def : Pat<(SPlo tblockaddress:$in), (ORXri (i64 G0), tblockaddress:$in)>;
322 BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) in copyPhysReg()362 .addReg(SP::G0) in copyPhysReg()384 MIB.addReg(SP::G0); in copyPhysReg()
129 def G0 : Ri< 0, "G0">, DwarfRegNum<[0]>;286 def G0_G1 : Rdi<0, "G0", [G0, G1]>;
140 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()357 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
1124 // to construct a MEMrr with fixed G0 registers.1651 (ORrr (i32 G0), (i32 G0))>;1654 (ORri (i32 G0), imm:$val)>;1664 def : Pat<(SPlo tglobaladdr:$in), (ORri (i32 G0), tglobaladdr:$in)>;1666 def : Pat<(SPlo tconstpool:$in), (ORri (i32 G0), tconstpool:$in)>;1670 def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i32 G0), tglobaltlsaddr:$in)>;1678 def : Pat<(SPlo tblockaddress:$in), (ORri (i32 G0), tblockaddress:$in)>;1706 def : Pat<(store (i32 0), ADDRrr:$dst), (STrr ADDRrr:$dst, (i32 G0))>;1707 def : Pat<(store (i32 0), ADDRri:$dst), (STri ADDRri:$dst, (i32 G0))>;
73 Reserved.set(SP::G0); in getReservedRegs()
394 MI->getOperand(opNum+1).getReg() == SP::G0) in printMemOperand()
46 AFLAGS= -G050 -G0 \56 -G0 \
1 # GP-rel: G0 only13 MULTILIB_EXTRA_OPTS = G0
75 G0SCS0 G0 SCS Special Graphics ^[ ( 076 G0SCS1 G0 SCS US ASCII ^[ ( 177 G0SCS2 G0 SCS Special Graphics ^[ ( 278 G0SCSA G0 SCS UK National ^[ ( A79 G0SCSB G0 SCS US ASCII ^[ ( B
68 case SP::G0: // jmp $addr | ret | retl in printSparcAliasInstr()156 if (Op1.isReg() && Op1.getReg() != SP::G0) { in printMemOperand()164 PrintedFirstOperand && ((Op2.isReg() && Op2.getReg() == SP::G0) || in printMemOperand()
14 1u1P3z8wYAZnko5hhV8atYyzD2Gp+t9dxGQA6oexM199y6OFJG4sZTvqcz+G0/3o5ALGYWomF1IB
79 CFLAGS+= -G0 \
45 EXTRA_FLAGS=-fno-pic -mno-abicalls -G0 -DKERNLOADADDR=${KERNLOADADDR}
74 groups = "G0";
136 Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3,461 if (Reg >= Sparc::G0 && Reg <= Sparc::G7) in MorphToIntPairReg()462 regIdx = Reg - Sparc::G0; in MorphToIntPairReg()537 Op->Mem.OffsetReg = Sparc::G0; // always 0 in CreateMEMr()588 MCOperand PrevReg = MCOperand::createReg(Sparc::G0); in expandSET()788 Operands.push_back(SparcOperand::MorphToMEMri(Sparc::G0, std::move(LHS))); in parseMEMOperand()
26 …-branch-likely -fno-pic -mno-abicalls -ffunction-sections -fdata-sections -G0 -Wall -Werror -c $S/…
175 CFLAGS+= -G0 -fno-pic -mno-abicalls
110 enum regnames {G0, G1, G2, G3, G4, G5, G6, G7, enumerator
314 CFLAGS += -G0
3199 #define G0 0 macro3248 == (INSN_OR | RD (O7) | RS2 (G0))))3258 != (INSN_OR | RS1 (O7) | RS2 (G0)))3269 || reg == G0 || reg == O7)
1412 APInt G0 = AM.abs(); in findGCD() local1414 APInt Q = G0; // these need to be initialized in findGCD()1415 APInt R = G0; in findGCD()1416 APInt::sdivrem(G0, G1, Q, R); in findGCD()1420 G0 = G1; G1 = R; in findGCD()1421 APInt::sdivrem(G0, G1, Q, R); in findGCD()