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Searched refs:FPU (Results 1 – 25 of 100) sorted by relevance

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/freebsd-12-stable/contrib/llvm-project/clang/lib/Basic/Targets/
DAArch64.cpp265 if (FPU & NeonMode) { in getTargetDefines()
271 if (FPU & SveMode) in getTargetDefines()
316 if ((FPU & NeonMode) && HasFullFP16) in getTargetDefines()
343 if ((FPU & SveMode) && HasBFloat16) { in getTargetDefines()
347 if ((FPU & SveMode) && HasMatmulFP64) in getTargetDefines()
350 if ((FPU & SveMode) && HasMatmulFP32) in getTargetDefines()
353 if ((FPU & SveMode) && HasMatMul) in getTargetDefines()
356 if ((FPU & NeonMode) && HasFP16FML) in getTargetDefines()
431 (Feature == "neon" && (FPU & NeonMode)) || in hasFeature()
436 (FPU & SveMode)) || in hasFeature()
[all …]
DARM.cpp427 FPU = 0; in handleTargetFeatures()
450 FPU |= VFP2FPU; in handleTargetFeatures()
456 FPU |= VFP3FPU; in handleTargetFeatures()
462 FPU |= VFP4FPU; in handleTargetFeatures()
468 FPU |= FPARMV8; in handleTargetFeatures()
473 FPU |= NeonFPU; in handleTargetFeatures()
508 FPU |= FPARMV8; in handleTargetFeatures()
541 if (!(FPU & NeonFPU) && FPMath == FP_Neon) { in handleTargetFeatures()
560 .Case("neon", (FPU & NeonFPU) && !SoftFloat) in hasFeature()
561 .Case("vfp", FPU && !SoftFloat) in hasFeature()
[all …]
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
DSystemZScheduleZEC12.td84 def : WriteRes<FPU, [ZEC12_FPUnit]>;
89 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [ZEC12_FPUnit]>;
756 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
757 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
782 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
786 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
787 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
792 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
794 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
795 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
DSystemZScheduleZ196.td83 def : WriteRes<FPU, [Z196_FPUnit]>;
88 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
718 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
719 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
744 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
748 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
749 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
754 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
756 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
757 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
[all …]
/freebsd-12-stable/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterInfoPOSIX_arm.cpp25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm::FPU, fpscr) + \
29 sizeof(RegisterInfoPOSIX_arm::FPU))
32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
163 return sizeof(struct RegisterInfoPOSIX_arm::FPU); in GetFPRSize()
DRegisterContextDarwin_arm64.h80 struct FPU { struct
114 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), // ARM_NEON_STATE64_COUNT
123 FPU fpu;
204 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
212 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_i386.h75 struct FPU { struct
107 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
114 FPU fpu;
185 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
191 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_x86_64.h80 struct FPU { struct
112 FPUWordCount = sizeof(FPU) / sizeof(uint32_t), argument
119 FPU fpu;
190 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
196 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextDarwin_arm.h98 struct FPU { struct
148 FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
156 FPU fpu;
237 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
245 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
DRegisterContextMach_i386.cpp29 int RegisterContextMach_i386::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
47 const FPU &fpu) { in DoWriteFPU()
49 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_x86_64.cpp31 FPU &fpu) { in DoReadFPU()
50 const FPU &fpu) { in DoWriteFPU()
52 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_arm.cpp31 int RegisterContextMach_arm::DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) { in DoReadFPU()
54 const FPU &fpu) { in DoWriteFPU()
56 tid, flavor, reinterpret_cast<thread_state_t>(const_cast<FPU *>(&fpu)), in DoWriteFPU()
DRegisterContextMach_i386.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
30 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_x86_64.h25 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
31 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterContextMach_arm.h24 int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) override;
32 int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) override;
DRegisterInfoPOSIX_arm64.cpp25 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) + \
49 sizeof(RegisterInfoPOSIX_arm64::FPU))
53 sizeof(RegisterInfoPOSIX_arm64::FPU) + \
66 sizeof(RegisterInfoPOSIX_arm64::FPU) + \
247 return sizeof(struct RegisterInfoPOSIX_arm64::FPU); in GetFPRSize()
DRegisterContextDarwin_i386.cpp133 (LLVM_EXTENSION offsetof(RegisterContextDarwin_i386::FPU, reg) + \
138 sizeof(RegisterContextDarwin_i386::FPU))
148 #reg, NULL, sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg), \
152 sizeof(((RegisterContextDarwin_i386::FPU *) NULL)->reg[i].bytes), \
164 sizeof(RegisterContextDarwin_i386::FPU) + \
/freebsd-12-stable/contrib/gcc/config/sparc/
Dsparc.opt23 Target Report Mask(FPU)
27 Target RejectNegative Mask(FPU) MaskExists
31 Target RejectNegative InverseMask(FPU)
/freebsd-12-stable/contrib/gcc/config/rs6000/
D6xx.md28 ;; PPC604 32-bit 2xSCIU, MCIU, LSU, FPU, BPU
29 ;; PPC604e 32-bit 2xSCIU, MCIU, LSU, FPU, BPU, CRU
32 ;; FPU 3 stage pipelined
40 ;; PPC620 64-bit 2xSCIU, MCIU, LSU, FPU, BPU, CRU
146 ; FPU PPC604{,e},PPC620
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
DARMELFStreamer.cpp97 void emitFPU(unsigned FPU) override;
236 void ARMTargetAsmStreamer::emitFPU(unsigned FPU) { in emitFPU() argument
237 OS << "\t.fpu\t" << ARM::getFPUName(FPU) << "\n"; in emitFPU()
277 unsigned FPU = ARM::FK_INVALID; member in __anonf683a7ac0111::ARMTargetELFStreamer
309 void emitFPU(unsigned FPU) override;
820 FPU = Value; in emitFPU()
826 switch (FPU) { in emitFPUDefaultAttributes()
933 report_fatal_error("Unknown FPU: " + Twine(FPU)); in emitFPUDefaultAttributes()
941 if (FPU != ARM::FK_INVALID) in finishAttributeSection()
971 FPU = ARM::FK_INVALID; in finishAttributeSection()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Support/
DARMTargetParser.cpp260 unsigned ARM::parseFPU(StringRef FPU) { in parseFPU() argument
261 StringRef Syn = getFPUSynonym(FPU); in parseFPU()
334 StringRef ARM::getFPUSynonym(StringRef FPU) { in getFPUSynonym() argument
335 return StringSwitch<StringRef>(FPU) in getFPUSynonym()
348 .Default(FPU); in getFPUSynonym()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/Mips/
DMipsRegisterInfo.td49 // Mips 32-bit FPU Registers
52 // Mips 64-bit (aliased) FPU Registers
154 /// Mips Single point precision FPU Registers
162 /// Mips Double point precision FPU Registers (aliased
169 /// Mips Double point precision FPU Registers in MFP64 mode.
175 /// MSA and FPU cannot both be present unless the FPU has 64-bit registers
428 // MIPS32r6/MIPS64r6 store FPU condition codes in normal FGR registers.
/freebsd-12-stable/sys/mips/conf/
DSENTRY522 # * The Broadcom CPUs have no FPU. Attempting to detect one by reading CP1's
23 # status register causes an unhandled boot-time exception. An FPU emulator
/freebsd-12-stable/contrib/file/magic/Magdir/
Dolf63 >>36 lelong 1 MathCoPro/FPU/MAU Required
98 >>36 belong 1 MathCoPro/FPU/MAU Required
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
DPPCScheduleP8.td27 // 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
41 // The Floating-Point Unit (FPU) and Vector Media Extension (VMX) units
44 // FPU, so keep in mind that FPU==VSU.
394 // to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).

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