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Searched refs:FPR128 (Results 1 – 6 of 6) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2501 // Match all load 128 bits width whose type is compatible with FPR128
2654 // Match all load 128 bits width whose type is compatible with FPR128
2840 // Match all load 128 bits width whose type is compatible with FPR128
3098 def : Pat<(AArch64stnp FPR128:$Rt, FPR128:$Rt2, (am_indexed7s128 GPR64sp:$Rn, simm7s16:$offset)),
3099 (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, simm7s16:$offset)>;
3120 def : Pat<(store (f128 FPR128:$Rt),
3123 (STRQroW FPR128:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend128:$extend)>;
3124 def : Pat<(store (f128 FPR128:$Rt),
3127 (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Wextend128:$extend)>;
3177 // Match all store 128 bits width whose type is compatible with FPR128
[all …]
DAArch64RegisterInfo.td455 def FPR128 : RegisterClass<"AArch64",
465 128, (trunc FPR128, 16)>;
486 def QSeqPairs : RegisterTuples<[qsub0, qsub1], [(rotl FPR128, 0), (rotl FPR128, 1)]>;
488 [(rotl FPR128, 0), (rotl FPR128, 1),
489 (rotl FPR128, 2)]>;
491 [(rotl FPR128, 0), (rotl FPR128, 1),
492 (rotl FPR128, 2), (rotl FPR128, 3)]>;
519 def V128 : RegisterOperand<FPR128, "printVRegOperand"> {
648 defm VecListOne : VectorList<1, FPR64, FPR128>;
680 def FPR128Op : RegisterOperand<FPR128, "printOperand"> {
[all …]
DAArch64FrameLowering.cpp2223 enum RegType { GPR, FPR64, FPR128, PPR, ZPR } Type; enumerator
2237 case FPR128: in getScale()
2295 RPI.Type = RegPairInfo::FPR128; in computeCalleeSaveRegisterPairs()
2320 case RegPairInfo::FPR128: in computeCalleeSaveRegisterPairs()
2394 !RPI.isScalable() && RPI.Type != RegPairInfo::FPR128 && in computeCalleeSaveRegisterPairs()
2542 case RegPairInfo::FPR128: in spillCalleeSavedRegisters()
2648 case RegPairInfo::FPR128: in restoreCalleeSavedRegisters()
DAArch64InstrFormats.td10904 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst),
10905 (ins FPR128:$Rd, FPR32:$Rn, V128:$Rm),
10906 [(set (v4i32 FPR128:$dst),
10907 (OpNode (v4i32 FPR128:$Rd), (i32 FPR32:$Rn),
10918 : SHA3OpTiedInst<opc, asm, "", (outs FPR128:$dst),
10919 (ins FPR128:$Rd, FPR128:$Rn, V128:$Rm),
10920 [(set (v4i32 FPR128:$dst),
10921 (OpNode (v4i32 FPR128:$Rd), (v4i32 FPR128:$Rn),
11000 : CryptoRRR<op0, op1, (outs FPR128:$Vdst), (ins FPR128:$Vd, FPR128:$Vn, V128:$Vm),
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
DSystemZRegisterInfo.td217 class FPR128<bits<16> num, string n, FPR64 low, FPR64 high>
237 def F#I#Q : FPR128<I, "f"#I, !cast<FPR64>("F"#!add(I, 2)#"D"),
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/CSKY/
DCSKYRegisterInfo.td177 def FPR128 : RegisterClass<"CSKY",