| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1418 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1432 DemandedRHS.clearBit(i); in SimplifyDemandedVectorElts()
1437 simplifyAndSetOp(I, 2, DemandedRHS, UndefElts3); in SimplifyDemandedVectorElts()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| D | ValueTracking.cpp | 159 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
168 DemandedLHS = DemandedRHS = APInt::getNullValue(NumElts); in getShuffleDemandedElts()
189 DemandedRHS.setBit(M % NumElts); in getShuffleDemandedElts()
1704 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
1705 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) { in computeKnownBitsFromOperator()
1718 if (!!DemandedRHS) { in computeKnownBitsFromOperator()
1720 computeKnownBits(RHS, DemandedRHS, Known2, Depth + 1, Q); in computeKnownBitsFromOperator()
3149 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBitsImpl() local
3152 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) in ComputeNumSignBitsImpl()
3163 if (!!DemandedRHS) { in ComputeNumSignBitsImpl()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1123 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedBits() local
1132 DemandedRHS.clearAllBits(); in SimplifyDemandedBits()
1139 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedBits()
1142 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1154 if (!!DemandedRHS) { in SimplifyDemandedBits()
1155 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1165 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2701 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
2707 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedRHS, UndefRHS, in SimplifyDemandedVectorElts()
2720 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
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| D | SelectionDAG.cpp | 2813 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0); in computeKnownBits() local
2827 DemandedRHS.clearAllBits(); in computeKnownBits()
2834 DemandedRHS.setBit((unsigned)M % NumElts); in computeKnownBits()
2845 if (!!DemandedRHS) { in computeKnownBits()
2847 Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1); in computeKnownBits()
3724 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0); in ComputeNumSignBits() local
3738 DemandedRHS.setBit((unsigned)M % NumElts); in ComputeNumSignBits()
3743 if (!!DemandedRHS) { in ComputeNumSignBits()
3744 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1); in ComputeNumSignBits()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2905 SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG); in simplifyMul24() local
2906 if (DemandedLHS || DemandedRHS) in simplifyMul24()
2909 DemandedRHS ? DemandedRHS : RHS); in simplifyMul24()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6916 APInt &DemandedLHS, APInt &DemandedRHS) { in getPackDemandedElts() argument
6924 DemandedRHS = APInt::getNullValue(NumInnerElts); in getPackDemandedElts()
6934 DemandedRHS.setBit(InnerIdx); in getPackDemandedElts()
6941 APInt &DemandedLHS, APInt &DemandedRHS) { in getHorizDemandedElts() argument
6948 DemandedRHS = APInt::getNullValue(NumElts); in getHorizDemandedElts()
6961 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx + 0); in getHorizDemandedElts()
6962 DemandedRHS.setBit(LaneIdx + 2 * LocalIdx + 1); in getHorizDemandedElts()
34799 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
34800 getPackDemandedElts(VT, DemandedElts, DemandedLHS, DemandedRHS); in computeKnownBitsForTargetNode()
34810 if (!!DemandedRHS) { in computeKnownBitsForTargetNode()
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