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Searched refs:DFmode (Results 1 – 25 of 54) sorted by relevance

123

/freebsd-12-stable/contrib/gcc/config/
Dgofast.h36 set_optab_libfunc (add_optab, DFmode, "dpadd"); in gofast_maybe_init_libfuncs()
38 set_optab_libfunc (sub_optab, DFmode, "dpsub"); in gofast_maybe_init_libfuncs()
40 set_optab_libfunc (smul_optab, DFmode, "dpmul"); in gofast_maybe_init_libfuncs()
42 set_optab_libfunc (sdiv_optab, DFmode, "dpdiv"); in gofast_maybe_init_libfuncs()
44 set_optab_libfunc (cmp_optab, DFmode, "dpcmp"); in gofast_maybe_init_libfuncs()
63 set_optab_libfunc (eq_optab, DFmode, "dpcmp"); in gofast_maybe_init_libfuncs()
64 set_optab_libfunc (ne_optab, DFmode, "dpcmp"); in gofast_maybe_init_libfuncs()
65 set_optab_libfunc (gt_optab, DFmode, 0); in gofast_maybe_init_libfuncs()
66 set_optab_libfunc (ge_optab, DFmode, 0); in gofast_maybe_init_libfuncs()
67 set_optab_libfunc (lt_optab, DFmode, "dpcmp"); in gofast_maybe_init_libfuncs()
[all …]
/freebsd-12-stable/contrib/gcc/config/rs6000/
Drs6000.c2616 && GET_MODE (SUBREG_REG (op)) == DFmode) in invalid_e500_subreg()
2621 && mode == DFmode in invalid_e500_subreg()
2657 if (type != error_mark_node && TYPE_MODE (type) == DFmode) in rs6000_special_round_type_align()
2832 case DFmode: in rs6000_legitimate_offset_address_p()
2845 if (mode == DFmode || !TARGET_POWERPC64) in rs6000_legitimate_offset_address_p()
2930 if (TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode)) in legitimate_lo_sum_address_p()
2944 && !(TARGET_HARD_FLOAT && TARGET_FPRS && mode == DFmode))) in legitimate_lo_sum_address_p()
3007 || (((mode != DImode && mode != DFmode) || TARGET_E500_DOUBLE) in rs6000_legitimize_address()
3028 || (TARGET_E500_DOUBLE && (mode == DFmode in rs6000_legitimize_address()
3061 || ((TARGET_HARD_FLOAT && TARGET_FPRS) && mode == DFmode))) in rs6000_legitimize_address()
[all …]
Drs6000.h508 (TARGET_E500_DOUBLE && TYPE_MODE (TYPE) == DFmode) ? 64 : \
532 || (TARGET_E500_DOUBLE && (MODE) == DFmode))
550 : (TARGET_E500_DOUBLE && TYPE_MODE (TYPE) == DFmode) ? 64 \
564 || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \
1131 : (TARGET_E500_DOUBLE && (CLASS) == GENERAL_REGS && (MODE) == DFmode) \
1143 && ((((TO) == DFmode) + ((FROM) == DFmode)) == 1 \
Daix.h168 : TREE_TYPE (FIELD)) == DFmode \
Ddarwin.h403 : TREE_TYPE (FIELD)) == DFmode \
Drs6000.md4909 ;; DFmode insns, while, in fact, all fp insns are actually done in double.
5264 && !HONOR_NANS (DFmode) && !HONOR_SIGNED_ZEROS (DFmode)"
5266 operands[3] = gen_reg_rtx (DFmode);
5267 operands[4] = gen_reg_rtx (DFmode);
5268 operands[5] = CONST0_RTX (DFmode);
5519 && HONOR_SIGNED_ZEROS (DFmode)"
5529 && ! HONOR_SIGNED_ZEROS (DFmode)"
5539 && HONOR_SIGNED_ZEROS (DFmode)"
5549 && ! HONOR_SIGNED_ZEROS (DFmode)"
5673 operands[3] = force_reg (DFmode, CONST_DOUBLE_ATOF (\"4503601774854144\", DFmode));
[all …]
Dlinux64.h223 : TREE_TYPE (FIELD)) == DFmode) \
Dspe.md2250 "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
2260 "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
2268 "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
2276 "(TARGET_E500_DOUBLE && <MODE>mode == DFmode) || (TARGET_SPE && <MODE>mode != DFmode)"
2286 && (gpc_reg_operand (operands[0], DFmode)
2287 || gpc_reg_operand (operands[1], DFmode))"
Dpredicates.md225 case DFmode:
922 || ! memory_operand (SET_DEST (elt), DFmode)
924 || GET_MODE (SET_SRC (elt)) != DFmode)
1020 || ! memory_operand (SET_SRC (elt), DFmode)
1022 || GET_MODE (SET_DEST (elt)) != DFmode)
/freebsd-12-stable/contrib/gcc/
Dreg-stack.c765 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); in emit_pop_insn()
766 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); in emit_pop_insn()
781 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), in emit_pop_insn()
782 FP_MODE_REG (FIRST_STACK_REG, DFmode)); in emit_pop_insn()
790 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), in emit_pop_insn()
2127 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); in subst_asm_stack_regs()
2428 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode), in change_stack()
2450 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode), in change_stack()
2454 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode), in change_stack()
2503 FP_MODE_REG (old->reg[reg], DFmode)); in change_stack()
[all …]
/freebsd-12-stable/contrib/gcc/config/sparc/
Dsparc.md2470 "<V64:MODE>mode == DFmode || TARGET_VIS"
2482 && (register_operand (operands[0], DFmode)
2483 || register_or_zero_operand (operands[1], DFmode))"
2503 && (register_operand (operands[0], DFmode)
2504 || register_or_zero_operand (operands[1], DFmode))"
2544 && (register_operand (operands[0], DFmode)
2545 || register_or_zero_operand (operands[1], DFmode))"
2581 && (register_operand (operands[0], DFmode)
2582 || register_or_zero_operand (operands[1], DFmode))"
2589 ;; This pattern build DFmode constants in integer registers.
[all …]
Dsparc.c1016 || (mode == DFmode in sparc_expand_move()
2147 return gen_rtx_REG (DFmode, regno); in gen_df_reg()
2287 case DFmode: in emit_soft_tfmode_cvt()
2301 case DFmode: in emit_soft_tfmode_cvt()
2519 else if (! TARGET_FPU && TARGET_ARCH64 && register_operand (src, DFmode)) in eligible_for_restore_insn()
2941 && (mode == DFmode || mode == DImode)) in legitimate_address_p()
3802 mode = i < 32 ? DImode : DFmode; in save_or_restore_regs()
7812 set_conv_libfunc (sext_optab, TFmode, DFmode, "_Q_dtoq"); in sparc_init_libfuncs()
7814 set_conv_libfunc (trunc_optab, DFmode, TFmode, "_Q_qtod"); in sparc_init_libfuncs()
7833 set_conv_libfunc (sfix_optab, DImode, DFmode, "__dtoll"); in sparc_init_libfuncs()
[all …]
Dsparc.h1304 : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \
1323 : ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \
/freebsd-12-stable/contrib/gcc/config/s390/
Ds390.h370 (((MODE1) == SFmode || (MODE1) == DFmode) \
371 == ((MODE2) == SFmode || (MODE2) == DFmode))
Ds390.md257 ;; "ltdbr" in DFmode, and "ltebr" in SFmode.
261 ;; "mdbr" in DFmode, and "meebr" in SFmode.
1518 operands[2] = simplify_gen_subreg (DFmode, operands[0], TFmode, 0);
1519 operands[3] = simplify_gen_subreg (DFmode, operands[0], TFmode, 8);
1520 operands[4] = adjust_address_nv (operands[1], DFmode, 0);
1521 operands[5] = adjust_address_nv (operands[1], DFmode, 8);
1532 operands[2] = adjust_address_nv (operands[0], DFmode, 0);
1533 operands[3] = adjust_address_nv (operands[0], DFmode, 8);
1534 operands[4] = simplify_gen_subreg (DFmode, operands[1], TFmode, 0);
1535 operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, 8);
[all …]
Ds390.c2140 if ((GET_MODE (x) == DFmode || GET_MODE (x) == SFmode) in s390_rtx_costs()
2145 if (GET_MODE (x) == DFmode) in s390_rtx_costs()
2205 case DFmode: in s390_rtx_costs()
2254 else if (GET_MODE (x) == DFmode) in s390_rtx_costs()
2273 else if (GET_MODE (x) == DFmode) in s390_rtx_costs()
2657 : (mode == DImode || mode == DFmode)) in s390_secondary_output_reload_class()
5283 DFmode, DImode, DDmode, enumerator
6954 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset)); in save_fpr()
6961 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum)); in save_fpr()
6971 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset)); in restore_fpr()
[all …]
/freebsd-12-stable/contrib/gcc/config/i386/
Di386.h736 || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH)) \
916 || (MODE) == V2DImode || (MODE) == DFmode)
934 ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode \
1251 ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
Di386.c3509 case DFmode: in classify_argument()
3758 gen_rtx_REG (DFmode, in construct_container()
3854 case DFmode: in function_arg_advance()
3983 case DFmode: in function_arg()
4333 case DFmode: in ix86_libcall_value()
4383 && (mode == SFmode || mode == DFmode)) in ix86_value_regno()
4387 || (sse_level == 2 && mode == DFmode)) in ix86_value_regno()
8204 case DFmode: putc ('q', file); break; in print_operand()
8343 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode) in print_operand()
9479 m = adjust_address (op1, DFmode, 0); in ix86_expand_vector_move_misalign()
[all …]
Dsse.md177 operands[1] = simplify_gen_subreg (DFmode, operands[1], V2DFmode, 0);
178 operands[2] = CONST0_RTX (DFmode);
2094 rtx low = gen_rtx_REG (DFmode, REGNO (operands[1]));
2095 emit_move_insn (adjust_address (operands[0], DFmode, 0), low);
2096 emit_move_insn (adjust_address (operands[0], DFmode, 8), low);
2171 operands[1] = adjust_address (operands[1], DFmode, 8);
2197 op1 = gen_rtx_REG (DFmode, REGNO (op1));
2199 op1 = gen_lowpart (DFmode, op1);
2228 operands[0] = adjust_address (operands[0], DFmode, 8);
2257 operands[0] = adjust_address (operands[0], DFmode, 8);
/freebsd-12-stable/contrib/gcc/config/arm/
Darm.c758 set_optab_libfunc (add_optab, DFmode, "__aeabi_dadd"); in arm_init_libfuncs()
759 set_optab_libfunc (sdiv_optab, DFmode, "__aeabi_ddiv"); in arm_init_libfuncs()
760 set_optab_libfunc (smul_optab, DFmode, "__aeabi_dmul"); in arm_init_libfuncs()
761 set_optab_libfunc (neg_optab, DFmode, "__aeabi_dneg"); in arm_init_libfuncs()
762 set_optab_libfunc (sub_optab, DFmode, "__aeabi_dsub"); in arm_init_libfuncs()
765 set_optab_libfunc (eq_optab, DFmode, "__aeabi_dcmpeq"); in arm_init_libfuncs()
766 set_optab_libfunc (ne_optab, DFmode, NULL); in arm_init_libfuncs()
767 set_optab_libfunc (lt_optab, DFmode, "__aeabi_dcmplt"); in arm_init_libfuncs()
768 set_optab_libfunc (le_optab, DFmode, "__aeabi_dcmple"); in arm_init_libfuncs()
769 set_optab_libfunc (ge_optab, DFmode, "__aeabi_dcmpge"); in arm_init_libfuncs()
[all …]
Dvfp.md209 ;; DFmode moves
215 && ( register_operand (operands[0], DFmode)
216 || register_operand (operands[1], DFmode))"
336 && arm_general_register_operand (operands[0], DFmode)"
Dpredicates.md258 return GET_CODE (op) == MEM && memory_address_p (DFmode, XEXP (op, 0));
Darm.md198 ; fdivd DFmode floating point division
827 && !cirrus_fp_register (operands[2], DFmode))
828 operands[2] = force_reg (DFmode, operands[2]);
1055 if (!cirrus_fp_register (operands[1], DFmode))
1056 operands[1] = force_reg (DFmode, operands[1]);
1057 if (!cirrus_fp_register (operands[2], DFmode))
1058 operands[2] = force_reg (DFmode, operands[2]);
1355 && !cirrus_fp_register (operands[2], DFmode))
1356 operands[2] = force_reg (DFmode, operands[2]);
3237 if (!cirrus_fp_register (operands[1], DFmode))
[all …]
/freebsd-12-stable/contrib/gcc/config/mips/
Dmips.c2683 else if (mode == DFmode) in mips_rtx_costs()
3922 reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i); in function_arg()
4113 mode = TARGET_SINGLE_FLOAT ? SFmode : DFmode; in mips_setup_incoming_varargs()
6595 fpr_mode = (TARGET_SINGLE_FLOAT ? SFmode : DFmode); in mips_for_each_saved_reg()
6808 if (GET_MODE (reg) == DFmode && !TARGET_FLOAT64) in mips_save_reg()
7598 if (mode == DImode || mode == DFmode) in mips_pass_by_reference()
8121 gcc_assert (GET_MODE (retval) == SFmode || GET_MODE (retval) == DFmode); in build_mips16_call_stub()
9149 set_optab_libfunc (add_optab, DFmode, "__mips16_adddf3"); in mips_init_libfuncs()
9150 set_optab_libfunc (sub_optab, DFmode, "__mips16_subdf3"); in mips_init_libfuncs()
9151 set_optab_libfunc (smul_optab, DFmode, "__mips16_muldf3"); in mips_init_libfuncs()
[all …]
Dmips.md2710 rtx reg1 = gen_reg_rtx (DFmode);
2711 rtx reg2 = gen_reg_rtx (DFmode);
2721 emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode));
2733 emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1));
2755 rtx reg1 = gen_reg_rtx (DFmode);
2756 rtx reg2 = gen_reg_rtx (DFmode);
2764 emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode));
2776 emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1));
3799 if (mips_legitimize_move (DFmode, operands[0], operands[1]))
3807 && (register_operand (operands[0], DFmode)
[all …]

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