Searched refs:ByteVT (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 1105 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, ShuffleMask.size()); in ExpandBSWAP() local
1108 if (!TLI.isShuffleMaskLegal(ShuffleMask, ByteVT)) in ExpandBSWAP()
1112 SDValue Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Node->getOperand(0)); in ExpandBSWAP()
1113 Op = DAG.getVectorShuffle(ByteVT, DL, Op, DAG.getUNDEF(ByteVT), ShuffleMask); in ExpandBSWAP()
1136 EVT ByteVT = EVT::getVectorVT(*DAG.getContext(), MVT::i8, BSWAPMask.size()); in ExpandBITREVERSE() local
1137 if (TLI.isShuffleMaskLegal(BSWAPMask, ByteVT) && in ExpandBITREVERSE()
1138 (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, ByteVT) || in ExpandBITREVERSE()
1139 (TLI.isOperationLegalOrCustom(ISD::SHL, ByteVT) && in ExpandBITREVERSE()
1140 TLI.isOperationLegalOrCustom(ISD::SRL, ByteVT) && in ExpandBITREVERSE()
1141 TLI.isOperationLegalOrCustomOrPromote(ISD::AND, ByteVT) && in ExpandBITREVERSE()
[all …]
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 12403 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in lowerShuffleAsByteRotateAndPermute() local
12405 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, DAG.getBitcast(ByteVT, Hi), in lowerShuffleAsByteRotateAndPermute()
12406 DAG.getBitcast(ByteVT, Lo), in lowerShuffleAsByteRotateAndPermute()
12725 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in lowerShuffleAsByteRotate() local
12726 Lo = DAG.getBitcast(ByteVT, Lo); in lowerShuffleAsByteRotate()
12727 Hi = DAG.getBitcast(ByteVT, Hi); in lowerShuffleAsByteRotate()
12734 VT, DAG.getNode(X86ISD::PALIGNR, DL, ByteVT, Lo, Hi, in lowerShuffleAsByteRotate()
12742 assert(ByteVT == MVT::v16i8 && in lowerShuffleAsByteRotate()
29662 MVT ByteVT = MVT::getVectorVT(MVT::i8, VT.getSizeInBits() / 8); in LowerVectorCTPOP() local
29663 SDValue ByteOp = DAG.getBitcast(ByteVT, Op0); in LowerVectorCTPOP()
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| /freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 14126 EVT ByteVT = in LowerSVEIntrinsicEXT() local
14130 SDValue Op0 = DAG.getNode(ISD::BITCAST, dl, ByteVT, N->getOperand(1)); in LowerSVEIntrinsicEXT()
14131 SDValue Op1 = DAG.getNode(ISD::BITCAST, dl, ByteVT, N->getOperand(2)); in LowerSVEIntrinsicEXT()
14135 SDValue EXT = DAG.getNode(AArch64ISD::EXT, dl, ByteVT, Op0, Op1, Op2); in LowerSVEIntrinsicEXT()
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