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Searched refs:BrCond (Results 1 – 10 of 10) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
DIfConversion.cpp153 SmallVector<MachineOperand, 4> BrCond; member
626 if (!TII->reverseBranchCondition(BBI.BrCond)) { in reverseBranchCondition()
628 TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in reverseBranchCondition()
689 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
896 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
897 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1029 BBI.BrCond.clear(); in AnalyzeBranches()
1031 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in AnalyzeBranches()
1035 BBI.BrCond.clear(); in AnalyzeBranches()
1038 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
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DMachinePipeliner.cpp344 LI.BrCond.clear(); in canPipelineLoop()
345 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) { in canPipelineLoop()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
DVPlanHCFGBuilder.cpp299 Value *BrCond = Br->getCondition(); in buildPlainCFG() local
302 assert(IRDef2VPValue.count(BrCond) && in buildPlainCFG()
304 VPValue *VPCondBit = IRDef2VPValue[BrCond]; in buildPlainCFG()
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DCombinerHelper.h167 bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
168 void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
DCombinerHelper.cpp1038 MachineInstr *&BrCond) { in matchOptBrCondByInvertingCond() argument
1060 BrCond = &*std::prev(BrIt); in matchOptBrCondByInvertingCond()
1061 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1066 MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB(); in matchOptBrCondByInvertingCond()
1072 MachineInstr *&BrCond) { in applyOptBrCondByInvertingCond() argument
1074 Builder.setInstrAndDebugLoc(*BrCond); in applyOptBrCondByInvertingCond()
1075 LLT Ty = MRI.getType(BrCond->getOperand(0).getReg()); in applyOptBrCondByInvertingCond()
1081 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
1083 auto *FallthroughBB = BrCond->getOperand(1).getMBB(); in applyOptBrCondByInvertingCond()
1090 Observer.changingInstr(*BrCond); in applyOptBrCondByInvertingCond()
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DIRTranslator.cpp801 auto BrCond = MIB.buildBrCond(Cmp.getReg(0), *JT.Default); in emitJumpTableHeader() local
805 BrCond = MIB.buildBr(*JT.MBB); in emitJumpTableHeader()
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
DMachinePipeliner.h80 SmallVector<MachineOperand, 4> BrCond; member
/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp4845 if (MachineInstr *BrCond = in legalizeIntrinsic() local
4853 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
4858 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
4883 BrCond->eraseFromParent(); in legalizeIntrinsic()
4893 if (MachineInstr *BrCond = in legalizeIntrinsic() local
4898 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
4904 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
4915 BrCond->eraseFromParent(); in legalizeIntrinsic()
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp2515 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
2522 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
2525 DAG.setRoot(BrCond); in visitSwitchCase()
2578 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
2584 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
2587 DAG.setRoot(BrCond); in visitJumpTableHeader()
2702 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent() local
2707 MVT::Other, BrCond, in visitSPDescriptorParent()
10591 SDValue BrCond = in lowerWorkItem() local
10595 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, in lowerWorkItem()
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/freebsd-12-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
DSimplifyCFG.cpp2363 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
2364 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
2495 BrCond, TrueV, FalseV, "spec.store.select", BI); in SpeculativelyExecuteBB()
2535 Value *V = Builder.CreateSelect(BrCond, TrueV, FalseV, "spec.select", BI); in SpeculativelyExecuteBB()